2 * Copyright (C) 1995-2007 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
21 * This file implements the creation of the architecture specific firm opcodes
22 * and the corresponding node constructors for the arm assembler irg.
32 #include "irgraph_t.h"
38 #include "firm_common_t.h"
43 #include "../bearch_t.h"
45 #include "arm_nodes_attr.h"
46 #include "arm_new_nodes.h"
47 #include "gen_arm_regalloc_if_t.h"
50 #include "bearch_arm_t.h"
53 * Returns the shift modifier string.
55 const char *arm_shf_mod_name(arm_shift_modifier mod) {
56 static const char *names[] = { NULL, NULL, "asr", "lsl", "lsr", "ror", "rrx" };
60 /***********************************************************************************
63 * __| |_ _ _ __ ___ _ __ ___ _ __ _ _ __ | |_ ___ _ __| |_ __ _ ___ ___
64 * / _` | | | | '_ ` _ \| '_ \ / _ \ '__| | | '_ \| __/ _ \ '__| _/ _` |/ __/ _ \
65 * | (_| | |_| | | | | | | |_) | __/ | | | | | | || __/ | | || (_| | (_| __/
66 * \__,_|\__,_|_| |_| |_| .__/ \___|_| |_|_| |_|\__\___|_| |_| \__,_|\___\___|
69 ***********************************************************************************/
72 * Dumps the register requirements for either in or out.
74 static void dump_reg_req(FILE *F, const ir_node *node,
75 const arch_register_req_t **reqs, int inout) {
76 char *dir = inout ? "out" : "in";
77 int max = inout ? get_arm_n_res(node) : get_irn_arity(node);
81 memset(buf, 0, sizeof(buf));
84 for (i = 0; i < max; i++) {
85 fprintf(F, "%sreq #%d =", dir, i);
87 if (reqs[i]->type == arch_register_req_type_none) {
91 if (reqs[i]->type & arch_register_req_type_normal) {
92 fprintf(F, " %s", reqs[i]->cls->name);
95 if (reqs[i]->type & arch_register_req_type_limited) {
97 arch_register_req_format(buf, sizeof(buf), reqs[i], node));
100 if (reqs[i]->type & arch_register_req_type_should_be_same) {
101 ir_fprintf(F, " same as %+F", get_irn_n(node, reqs[i]->other_same));
104 if (reqs[i]->type & arch_register_req_type_should_be_different) {
105 ir_fprintf(F, " different from %+F", get_irn_n(node, reqs[i]->other_different));
113 fprintf(F, "%sreq = N/A\n", dir);
118 * Dumper interface for dumping arm nodes in vcg.
119 * @param n the node to dump
120 * @param F the output file
121 * @param reason indicates which kind of information should be dumped
122 * @return 0 on success or != 0 on failure
124 static int arm_dump_node(ir_node *n, FILE *F, dump_reason_t reason) {
125 ir_mode *mode = NULL;
128 arm_attr_t *attr = get_arm_attr(n);
129 const arch_register_req_t **reqs;
130 const arch_register_t **slots;
131 arm_shift_modifier mod;
134 case dump_node_opcode_txt:
135 fprintf(F, "%s", get_irn_opname(n));
138 case dump_node_mode_txt:
139 mode = get_irn_mode(n);
142 fprintf(F, "[%s]", get_mode_name(mode));
145 fprintf(F, "[?NOMODE?]");
149 case dump_node_nodeattr_txt:
150 mod = ARM_GET_SHF_MOD(attr);
151 if (ARM_HAS_SHIFT(mod)) {
152 fprintf(F, "[%s #%ld]", arm_shf_mod_name(mod), get_tarval_long(attr->value));
154 else if (mod == ARM_SHF_IMM) {
156 fprintf(F, "[#0x%X]", arm_decode_imm_w_shift(attr->value));
160 case dump_node_info_txt:
161 fprintf(F, "=== arm attr begin ===\n");
163 /* dump IN requirements */
164 if (get_irn_arity(n) > 0) {
165 reqs = get_arm_in_req_all(n);
166 dump_reg_req(F, n, reqs, 0);
169 /* dump OUT requirements */
170 if (attr->n_res > 0) {
171 reqs = get_arm_out_req_all(n);
172 dump_reg_req(F, n, reqs, 1);
175 /* dump assigned registers */
176 slots = get_arm_slots(n);
177 if (slots && attr->n_res > 0) {
178 for (i = 0; i < attr->n_res; i++) {
180 fprintf(F, "reg #%d = %s\n", i, slots[i]->name);
183 fprintf(F, "reg #%d = n/a\n", i);
190 fprintf(F, "n_res = %d\n", get_arm_n_res(n));
193 fprintf(F, "flags =");
194 if (attr->flags == arch_irn_flags_none) {
198 if (attr->flags & arch_irn_flags_dont_spill) {
199 fprintf(F, " unspillable");
201 if (attr->flags & arch_irn_flags_rematerializable) {
202 fprintf(F, " remat");
204 if (attr->flags & arch_irn_flags_ignore) {
205 fprintf(F, " ignore");
208 fprintf(F, " (%d)\n", attr->flags);
210 if (get_arm_value(n)) {
211 if (is_arm_CopyB(n)) {
212 fprintf(F, "size = %lu\n", get_tarval_long(get_arm_value(n)));
214 if (mode_is_float(get_irn_mode(n))) {
215 fprintf(F, "float value = (%f)\n", (double) get_tarval_double(get_arm_value(n)));
216 } else if (mode_is_int(get_irn_mode(n))) {
217 long v = get_tarval_long(get_arm_value(n));
218 fprintf(F, "long value = %ld (0x%08lx)\n", v, v);
219 } else if (mode_is_reference(get_irn_mode(n))) {
220 fprintf(F, "pointer\n");
222 assert(0 && "unbehandelter Typ im const-Knoten");
226 if (get_arm_proj_num(n) >= 0) {
227 fprintf(F, "proj_num = (%d)\n", get_arm_proj_num(n));
229 /* TODO: dump all additional attributes */
231 fprintf(F, "=== arm attr end ===\n");
232 /* end of: case dump_node_info_txt */
240 /***************************************************************************************************
242 * | | | | | | / / | | | | | | | |
243 * __ _| |_| |_ _ __ ___ ___| |_ / /_ _ ___| |_ _ __ ___ ___| |_| |__ ___ __| |___
244 * / _` | __| __| '__| / __|/ _ \ __| / / _` |/ _ \ __| | '_ ` _ \ / _ \ __| '_ \ / _ \ / _` / __|
245 * | (_| | |_| |_| | \__ \ __/ |_ / / (_| | __/ |_ | | | | | | __/ |_| | | | (_) | (_| \__ \
246 * \__,_|\__|\__|_| |___/\___|\__/_/ \__, |\___|\__| |_| |_| |_|\___|\__|_| |_|\___/ \__,_|___/
249 ***************************************************************************************************/
252 * Wraps get_irn_generic_attr() as it takes no const ir_node, so we need to do a cast.
253 * Firm was made by people hating const :-(
255 arm_attr_t *get_arm_attr(const ir_node *node) {
256 assert(is_arm_irn(node) && "need arm node to get attributes");
257 return (arm_attr_t *)get_irn_generic_attr((ir_node *)node);
261 * Returns the argument register requirements of a arm node.
263 const arch_register_req_t **get_arm_in_req_all(const ir_node *node) {
264 arm_attr_t *attr = get_arm_attr(node);
269 * Returns the result register requirements of an arm node.
271 const arch_register_req_t **get_arm_out_req_all(const ir_node *node) {
272 arm_attr_t *attr = get_arm_attr(node);
273 return attr->out_req;
277 * Returns the argument register requirement at position pos of an arm node.
279 const arch_register_req_t *get_arm_in_req(const ir_node *node, int pos) {
280 arm_attr_t *attr = get_arm_attr(node);
281 return attr->in_req[pos];
285 * Returns the result register requirement at position pos of an arm node.
287 const arch_register_req_t *get_arm_out_req(const ir_node *node, int pos) {
288 arm_attr_t *attr = get_arm_attr(node);
289 return attr->out_req[pos];
293 * Sets the OUT register requirements at position pos.
295 void set_arm_req_out(ir_node *node, const arch_register_req_t *req, int pos) {
296 arm_attr_t *attr = get_arm_attr(node);
297 attr->out_req[pos] = req;
301 * Sets the complete OUT requirements of node.
303 void set_arm_req_out_all(ir_node *node, const arch_register_req_t **reqs) {
304 arm_attr_t *attr = get_arm_attr(node);
305 attr->out_req = reqs;
309 * Sets the IN register requirements at position pos.
311 void set_arm_req_in(ir_node *node, const arch_register_req_t *req, int pos) {
312 arm_attr_t *attr = get_arm_attr(node);
313 attr->in_req[pos] = req;
317 * Returns the register flag of an arm node.
319 arch_irn_flags_t get_arm_flags(const ir_node *node) {
320 arm_attr_t *attr = get_arm_attr(node);
325 * Sets the register flag of an arm node.
327 void set_arm_flags(const ir_node *node, arch_irn_flags_t flags) {
328 arm_attr_t *attr = get_arm_attr(node);
333 * Returns the result register slots of an arm node.
335 const arch_register_t **get_arm_slots(const ir_node *node) {
336 arm_attr_t *attr = get_arm_attr(node);
341 * Returns the name of the OUT register at position pos.
343 const char *get_arm_out_reg_name(const ir_node *node, int pos) {
344 arm_attr_t *attr = get_arm_attr(node);
346 assert(is_arm_irn(node) && "Not an arm node.");
347 assert(pos < attr->n_res && "Invalid OUT position.");
348 assert(attr->slots[pos] && "No register assigned");
350 return arch_register_get_name(attr->slots[pos]);
354 * Returns the index of the OUT register at position pos within its register class.
356 int get_arm_out_regnr(const ir_node *node, int pos) {
357 arm_attr_t *attr = get_arm_attr(node);
359 assert(is_arm_irn(node) && "Not an arm node.");
360 assert(pos < attr->n_res && "Invalid OUT position.");
361 assert(attr->slots[pos] && "No register assigned");
363 return arch_register_get_index(attr->slots[pos]);
367 * Returns the OUT register at position pos.
369 const arch_register_t *get_arm_out_reg(const ir_node *node, int pos) {
370 arm_attr_t *attr = get_arm_attr(node);
372 assert(is_arm_irn(node) && "Not an arm node.");
373 assert(pos < attr->n_res && "Invalid OUT position.");
374 assert(attr->slots[pos] && "No register assigned");
376 return attr->slots[pos];
380 * Sets the number of results.
382 void set_arm_n_res(ir_node *node, int n_res) {
383 arm_attr_t *attr = get_arm_attr(node);
388 * Returns the number of results.
390 int get_arm_n_res(const ir_node *node) {
391 arm_attr_t *attr = get_arm_attr(node);
395 * Returns the tarvalue
397 tarval *get_arm_value(const ir_node *node) {
398 arm_attr_t *attr = get_arm_attr(node);
405 void set_arm_value(ir_node *node, tarval *tv) {
406 arm_attr_t *attr = get_arm_attr(node);
411 * Returns the proj num
413 int get_arm_proj_num(const ir_node *node) {
414 arm_attr_t *attr = get_arm_attr(node);
415 return attr->proj_num;
421 void set_arm_proj_num(ir_node *node, int proj_num) {
422 arm_attr_t *attr = get_arm_attr(node);
423 attr->proj_num = proj_num;
427 * Returns the SymConst label
429 const char *get_arm_symconst_label(ir_node *node) {
430 arm_attr_t *attr = get_arm_attr(node);
431 return attr->symconst_label;
435 * Sets the SymConst label
437 void set_arm_symconst_label(ir_node *node, const char *symconst_label) {
438 arm_attr_t *attr = get_arm_attr(node);
439 attr->symconst_label = symconst_label;
444 * Returns the number of projs.
446 int get_arm_n_projs(ir_node *node) {
447 arm_attr_t *attr = get_arm_attr(node);
448 return attr->n_projs;
452 * Sets the number of projs.
454 void set_arm_n_projs(ir_node *node, int n_projs) {
455 arm_attr_t *attr = get_arm_attr(node);
456 attr->n_projs = n_projs;
460 * Returns the default_proj_num.
462 long get_arm_default_proj_num(ir_node *node) {
463 arm_attr_t *attr = get_arm_attr(node);
464 return attr->default_proj_num;
468 * Sets the default_proj_num.
470 void set_arm_default_proj_num(ir_node *node, long default_proj_num) {
471 arm_attr_t *attr = get_arm_attr(node);
472 attr->default_proj_num = default_proj_num;
476 * Gets the shift modifier attribute.
478 arm_shift_modifier get_arm_shift_modifier(ir_node *node) {
479 arm_attr_t *attr = get_arm_attr(node);
480 return ARM_GET_SHF_MOD(attr);
483 /* Set the ARM machine node attributes to default values. */
484 void init_arm_attributes(ir_node *node, int flags, const arch_register_req_t ** in_reqs,
485 const arch_register_req_t ** out_reqs, const be_execution_unit_t ***execution_units,
486 int n_res, unsigned latency) {
487 arm_attr_t *attr = get_arm_attr(node);
488 attr->in_req = in_reqs;
489 attr->out_req = out_reqs;
492 attr->instr_fl = (ARM_COND_AL << 3) | ARM_SHF_NONE;
494 attr->proj_num = -42;
495 attr->symconst_label = NULL;
497 attr->default_proj_num = 0;
499 memset((void *)attr->slots, 0, n_res * sizeof(attr->slots[0]));
502 static int arm_comp_condJmp(arm_attr_t *attr_a, arm_attr_t *attr_b) {
507 /***************************************************************************************
510 * _ __ ___ __| | ___ ___ ___ _ __ ___| |_ _ __ _ _ ___| |_ ___ _ __ ___
511 * | '_ \ / _ \ / _` |/ _ \ / __/ _ \| '_ \/ __| __| '__| | | |/ __| __/ _ \| '__/ __|
512 * | | | | (_) | (_| | __/ | (_| (_) | | | \__ \ |_| | | |_| | (__| || (_) | | \__ \
513 * |_| |_|\___/ \__,_|\___| \___\___/|_| |_|___/\__|_| \__,_|\___|\__\___/|_| |___/
515 ***************************************************************************************/
520 #define BIT(x) (1 << (x % 32))
522 static unsigned arm_req_sp_limited[] = { BIT(REG_SP) };
523 static const arch_register_req_t _arm_req_sp = {
524 arch_register_req_type_limited,
525 &arm_reg_classes[CLASS_arm_gp],
531 /* construct Store: Store(ptr, val, mem) = ST ptr,val */
532 ir_node *new_r_arm_StoreStackMInc(ir_graph *irg, ir_node *block, ir_node *mem,
533 ir_node *sp, int n_regs, ir_node **regs,
538 static const arch_register_req_t *_in_req_arm_StoreStackM4Inc[] =
540 &arm_StoreStackM4Inc_reg_req_in_0,
541 &arm_StoreStackM4Inc_reg_req_in_1,
542 &arm_StoreStackM4Inc_reg_req_in_2,
543 &arm_StoreStackM4Inc_reg_req_in_2,
544 &arm_StoreStackM4Inc_reg_req_in_2,
545 &arm_StoreStackM4Inc_reg_req_in_2,
546 &arm_StoreStackM4Inc_reg_req_in_2,
547 &arm_StoreStackM4Inc_reg_req_in_2,
548 &arm_StoreStackM4Inc_reg_req_in_2,
549 &arm_StoreStackM4Inc_reg_req_in_2,
550 &arm_StoreStackM4Inc_reg_req_in_2,
551 &arm_StoreStackM4Inc_reg_req_in_2,
552 &arm_StoreStackM4Inc_reg_req_in_2,
553 &arm_StoreStackM4Inc_reg_req_in_2,
554 &arm_StoreStackM4Inc_reg_req_in_2,
555 &arm_StoreStackM4Inc_reg_req_in_2,
556 &arm_StoreStackM4Inc_reg_req_in_2,
559 assert(n_regs <= 15);
563 memcpy(&in[2], regs, n_regs * sizeof(in[0]));
564 res = new_ir_node(NULL, irg, block, op_arm_StoreStackM4Inc, mode, 2 + n_regs, in);
565 flags |= arch_irn_flags_rematerializable; /* op can be easily recalculated */
567 /* init node attributes */
568 init_arm_attributes(res, flags, _in_req_arm_StoreStackM4Inc, NULL, NULL, 0, 1);
570 res = optimize_node(res);
571 irn_vrfy_irg(res, irg);
576 /************************************************
578 * / _ \ _ __ | |_(_)_ __ ___ (_)_______ _ __ *
579 * | | | | '_ \| __| | '_ ` _ \| |_ / _ \ '__| *
580 * | |_| | |_) | |_| | | | | | | |/ / __/ | *
581 * \___/| .__/ \__|_|_| |_| |_|_/___\___|_| *
583 ************************************************/
585 typedef struct _opt_tuple {
586 ir_op *op_imm_left; /**< immediate is left */
587 ir_op *op_imm_right; /**< immediate is right */
588 ir_op *op_shf_left; /**< shift operand on left */
589 ir_op *op_shf_right; /**< shift operand on right */
592 //static const opt_tuple *opt_ops[iro_arm_last];
594 void arm_set_optimizers(void) {
596 #define STD(op) p_##op = { op_arm_##op##_i, op_arm_##op##_i, op_arm_##op, op_arm_##op }
597 #define LEFT(op) p_##op = { op_arm_##op##_i, NULL, op_arm_##op, NULL }
598 #define SET(op) opt_ops[iro_arm_##op] = &p_##op;
600 static const opt_tuple
609 p_Sub = { op_arm_Sub_i, op_arm_Rsb_i, op_arm_Sub, op_arm_Rsb },
611 memset(opt_ops, 0, sizeof(opt_ops));
625 /* Include the generated constructor functions */
626 #include "gen_arm_new_nodes.c.inl"