2 * Copyright (C) 1995-2008 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief This file implements the creation of the architecture specific firm
23 * opcodes and the corresponding node constructors for the arm
25 * @author Oliver Richter, Tobias Gneist
33 #include "irgraph_t.h"
39 #include "firm_common_t.h"
44 #include "../bearch_t.h"
46 #include "arm_nodes_attr.h"
47 #include "arm_new_nodes.h"
48 #include "arm_optimize.h"
51 #include "bearch_arm_t.h"
54 * Returns the shift modifier string.
56 const char *arm_shf_mod_name(arm_shift_modifier mod) {
57 static const char *names[] = { NULL, NULL, "asr", "lsl", "lsr", "ror", "rrx" };
62 * Return the fpa immediate from the encoding.
64 const char *arm_get_fpa_imm_name(long imm_value) {
65 static const char *fpa_imm[] = {
75 return fpa_imm[imm_value];
78 /***********************************************************************************
81 * __| |_ _ _ __ ___ _ __ ___ _ __ _ _ __ | |_ ___ _ __| |_ __ _ ___ ___
82 * / _` | | | | '_ ` _ \| '_ \ / _ \ '__| | | '_ \| __/ _ \ '__| _/ _` |/ __/ _ \
83 * | (_| | |_| | | | | | | |_) | __/ | | | | | | || __/ | | || (_| | (_| __/
84 * \__,_|\__,_|_| |_| |_| .__/ \___|_| |_|_| |_|\__\___|_| |_| \__,_|\___\___|
87 ***********************************************************************************/
90 * Dumps the register requirements for either in or out.
92 static void dump_reg_req(FILE *F, const ir_node *node,
93 const arch_register_req_t **reqs, int inout) {
94 char *dir = inout ? "out" : "in";
95 int max = inout ? get_arm_n_res(node) : get_irn_arity(node);
99 memset(buf, 0, sizeof(buf));
102 for (i = 0; i < max; i++) {
103 fprintf(F, "%sreq #%d =", dir, i);
105 if (reqs[i]->type == arch_register_req_type_none) {
109 if (reqs[i]->type & arch_register_req_type_normal) {
110 fprintf(F, " %s", reqs[i]->cls->name);
113 if (reqs[i]->type & arch_register_req_type_limited) {
115 arch_register_req_format(buf, sizeof(buf), reqs[i], node));
118 if (reqs[i]->type & arch_register_req_type_should_be_same) {
119 const unsigned other = reqs[i]->other_same;
122 ir_fprintf(F, " same as");
123 for (i = 0; 1U << i <= other; ++i) {
124 if (other & (1U << i)) {
125 ir_fprintf(F, " %+F", get_irn_n(node, i));
130 if (reqs[i]->type & arch_register_req_type_must_be_different) {
131 const unsigned other = reqs[i]->other_different;
134 ir_fprintf(F, " different from");
135 for (i = 0; 1U << i <= other; ++i) {
136 if (other & (1U << i)) {
137 ir_fprintf(F, " %+F", get_irn_n(node, i));
147 fprintf(F, "%sreq = N/A\n", dir);
152 * Dumper interface for dumping arm nodes in vcg.
153 * @param n the node to dump
154 * @param F the output file
155 * @param reason indicates which kind of information should be dumped
156 * @return 0 on success or != 0 on failure
158 static int arm_dump_node(ir_node *n, FILE *F, dump_reason_t reason) {
159 ir_mode *mode = NULL;
162 arm_attr_t *attr = get_arm_attr(n);
163 const arch_register_req_t **reqs;
164 const arch_register_t **slots;
165 arm_shift_modifier mod;
168 case dump_node_opcode_txt:
169 fprintf(F, "%s", get_irn_opname(n));
172 case dump_node_mode_txt:
173 mode = get_irn_mode(n);
176 fprintf(F, "[%s]", get_mode_name(mode));
179 fprintf(F, "[?NOMODE?]");
183 case dump_node_nodeattr_txt:
184 mod = ARM_GET_SHF_MOD(attr);
185 if (ARM_HAS_SHIFT(mod)) {
186 fprintf(F, "[%s #%ld]", arm_shf_mod_name(mod), attr->imm_value);
188 else if (mod == ARM_SHF_IMM) {
190 fprintf(F, "[#0x%X]", arm_decode_imm_w_shift(attr->imm_value));
194 case dump_node_info_txt:
195 fprintf(F, "=== arm attr begin ===\n");
197 /* dump IN requirements */
198 if (get_irn_arity(n) > 0) {
199 reqs = get_arm_in_req_all(n);
200 dump_reg_req(F, n, reqs, 0);
203 /* dump OUT requirements */
204 if (ARR_LEN(attr->slots) > 0) {
205 reqs = get_arm_out_req_all(n);
206 dump_reg_req(F, n, reqs, 1);
209 /* dump assigned registers */
210 slots = get_arm_slots(n);
211 if (slots && ARR_LEN(attr->slots) > 0) {
212 for (i = 0; i < ARR_LEN(attr->slots); i++) {
214 fprintf(F, "reg #%d = %s\n", i, slots[i]->name);
217 fprintf(F, "reg #%d = n/a\n", i);
224 fprintf(F, "n_res = %d\n", get_arm_n_res(n));
227 fprintf(F, "flags =");
228 if (attr->flags == arch_irn_flags_none) {
232 if (attr->flags & arch_irn_flags_dont_spill) {
233 fprintf(F, " unspillable");
235 if (attr->flags & arch_irn_flags_rematerializable) {
236 fprintf(F, " remat");
238 if (attr->flags & arch_irn_flags_ignore) {
239 fprintf(F, " ignore");
242 fprintf(F, " (%d)\n", attr->flags);
244 if (is_arm_CopyB(n)) {
245 fprintf(F, "size = %lu\n", get_arm_imm_value(n));
247 long v = get_arm_imm_value(n);
248 if (ARM_GET_FPA_IMM(attr)) {
249 fprintf(F, "immediate float value = %s\n", arm_get_fpa_imm_name(v));
251 fprintf(F, "immediate value = %ld (0x%08lx)\n", v, v);
255 if (is_arm_CmpBra(n) && get_arm_CondJmp_proj_num(n) >= 0) {
256 fprintf(F, "proj_num = (%d)\n", get_arm_CondJmp_proj_num(n));
258 /* TODO: dump all additional attributes */
260 fprintf(F, "=== arm attr end ===\n");
261 /* end of: case dump_node_info_txt */
269 /***************************************************************************************************
271 * | | | | | | / / | | | | | | | |
272 * __ _| |_| |_ _ __ ___ ___| |_ / /_ _ ___| |_ _ __ ___ ___| |_| |__ ___ __| |___
273 * / _` | __| __| '__| / __|/ _ \ __| / / _` |/ _ \ __| | '_ ` _ \ / _ \ __| '_ \ / _ \ / _` / __|
274 * | (_| | |_| |_| | \__ \ __/ |_ / / (_| | __/ |_ | | | | | | __/ |_| | | | (_) | (_| \__ \
275 * \__,_|\__|\__|_| |___/\___|\__/_/ \__, |\___|\__| |_| |_| |_|\___|\__|_| |_|\___/ \__,_|___/
278 ***************************************************************************************************/
280 /* Returns the attributes of a generic Arm node. */
281 arm_attr_t *get_arm_attr(ir_node *node) {
282 assert(is_arm_irn(node) && "need arm node to get attributes");
283 return get_irn_generic_attr(node);
286 const arm_attr_t *get_arm_attr_const(const ir_node *node) {
287 assert(is_arm_irn(node) && "need arm node to get attributes");
288 return get_irn_generic_attr_const(node);
292 * Returns the attributes of an ARM SymConst node.
294 arm_SymConst_attr_t *get_arm_SymConst_attr(ir_node *node) {
295 assert(is_arm_SymConst(node));
296 return get_irn_generic_attr(node);
299 const arm_SymConst_attr_t *get_arm_SymConst_attr_const(const ir_node *node) {
300 assert(is_arm_SymConst(node));
301 return get_irn_generic_attr_const(node);
304 static const arm_fpaConst_attr_t *get_arm_fpaConst_attr_const(const ir_node *node) {
305 const arm_attr_t *attr = get_arm_attr_const(node);
306 const arm_fpaConst_attr_t *fpa_attr = CONST_CAST_ARM_ATTR(arm_fpaConst_attr_t, attr);
311 static arm_fpaConst_attr_t *get_arm_fpaConst_attr(ir_node *node) {
312 arm_attr_t *attr = get_arm_attr(node);
313 arm_fpaConst_attr_t *fpa_attr = CAST_ARM_ATTR(arm_fpaConst_attr_t, attr);
318 static int is_arm_CondJmp(const ir_node *node) {
319 int code = get_arm_irn_opcode(node);
321 return (code == iro_arm_CmpBra || code == iro_arm_fpaCmfBra ||
322 code == iro_arm_fpaCnfBra || iro_arm_fpaCmfeBra ||
323 code == iro_arm_fpaCnfeBra);
326 /* Returns the attributes of a CondJmp node. */
327 arm_CondJmp_attr_t *get_arm_CondJmp_attr(ir_node *node) {
328 assert(is_arm_CondJmp(node));
329 return get_irn_generic_attr(node);
332 const arm_CondJmp_attr_t *get_arm_CondJmp_attr_const(const ir_node *node) {
333 assert(is_arm_CondJmp(node));
334 return get_irn_generic_attr_const(node);
337 /* Returns the attributes of a SwitchJmp node. */
338 arm_SwitchJmp_attr_t *get_arm_SwitchJmp_attr(ir_node *node) {
339 assert(is_arm_SwitchJmp(node));
340 return get_irn_generic_attr(node);
343 const arm_SwitchJmp_attr_t *get_arm_SwitchJmp_attr_const(const ir_node *node) {
344 assert(is_arm_SwitchJmp(node));
345 return get_irn_generic_attr_const(node);
349 * Returns the argument register requirements of a arm node.
351 const arch_register_req_t **get_arm_in_req_all(const ir_node *node) {
352 const arm_attr_t *attr = get_arm_attr_const(node);
357 * Returns the result register requirements of an arm node.
359 const arch_register_req_t **get_arm_out_req_all(const ir_node *node) {
360 const arm_attr_t *attr = get_arm_attr_const(node);
361 return attr->out_req;
365 * Returns the argument register requirement at position pos of an arm node.
367 const arch_register_req_t *get_arm_in_req(const ir_node *node, int pos) {
368 const arm_attr_t *attr = get_arm_attr_const(node);
369 return attr->in_req[pos];
373 * Returns the result register requirement at position pos of an arm node.
375 const arch_register_req_t *get_arm_out_req(const ir_node *node, int pos) {
376 const arm_attr_t *attr = get_arm_attr_const(node);
377 return attr->out_req[pos];
381 * Sets the OUT register requirements at position pos.
383 void set_arm_req_out(ir_node *node, const arch_register_req_t *req, int pos) {
384 arm_attr_t *attr = get_arm_attr(node);
385 attr->out_req[pos] = req;
389 * Sets the complete OUT requirements of node.
391 void set_arm_req_out_all(ir_node *node, const arch_register_req_t **reqs) {
392 arm_attr_t *attr = get_arm_attr(node);
393 attr->out_req = reqs;
397 * Sets the IN register requirements at position pos.
399 void set_arm_req_in(ir_node *node, const arch_register_req_t *req, int pos) {
400 arm_attr_t *attr = get_arm_attr(node);
401 attr->in_req[pos] = req;
405 * Returns the register flag of an arm node.
407 arch_irn_flags_t get_arm_flags(const ir_node *node) {
408 const arm_attr_t *attr = get_arm_attr_const(node);
413 * Sets the register flag of an arm node.
415 void set_arm_flags(ir_node *node, arch_irn_flags_t flags) {
416 arm_attr_t *attr = get_arm_attr(node);
421 * Returns the result register slots of an arm node.
423 const arch_register_t **get_arm_slots(const ir_node *node) {
424 const arm_attr_t *attr = get_arm_attr_const(node);
429 * Returns the name of the OUT register at position pos.
431 const char *get_arm_out_reg_name(const ir_node *node, int pos) {
432 const arm_attr_t *attr = get_arm_attr_const(node);
434 assert(is_arm_irn(node) && "Not an arm node.");
435 assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position.");
436 assert(attr->slots[pos] && "No register assigned");
438 return arch_register_get_name(attr->slots[pos]);
442 * Returns the index of the OUT register at position pos within its register class.
444 int get_arm_out_regnr(const ir_node *node, int pos) {
445 const arm_attr_t *attr = get_arm_attr_const(node);
447 assert(is_arm_irn(node) && "Not an arm node.");
448 assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position.");
449 assert(attr->slots[pos] && "No register assigned");
451 return arch_register_get_index(attr->slots[pos]);
455 * Returns the OUT register at position pos.
457 const arch_register_t *get_arm_out_reg(const ir_node *node, int pos) {
458 const arm_attr_t *attr = get_arm_attr_const(node);
460 assert(is_arm_irn(node) && "Not an arm node.");
461 assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position.");
462 assert(attr->slots[pos] && "No register assigned");
464 return attr->slots[pos];
468 * Sets the flags for the n'th out.
470 void set_arm_out_flags(ir_node *node, arch_irn_flags_t flags, int pos) {
471 arm_attr_t *attr = get_arm_attr(node);
472 assert(pos < ARR_LEN(attr->out_flags) && "Invalid OUT position.");
473 attr->out_flags[pos] = flags;
477 * Gets the flags for the n'th out.
479 arch_irn_flags_t get_arm_out_flags(const ir_node *node, int pos) {
480 const arm_attr_t *attr = get_arm_attr_const(node);
481 assert(pos < ARR_LEN(attr->out_flags) && "Invalid OUT position.");
482 return attr->out_flags[pos];
486 * Returns the number of results.
488 int get_arm_n_res(const ir_node *node) {
489 const arm_attr_t *attr = get_arm_attr_const(node);
490 return ARR_LEN(attr->slots);
494 * Returns the immediate value
496 long get_arm_imm_value(const ir_node *node) {
497 const arm_attr_t *attr = get_arm_attr_const(node);
498 return attr->imm_value;
502 * Sets the tarval value
504 void set_arm_imm_value(ir_node *node, long imm_value) {
505 arm_attr_t *attr = get_arm_attr(node);
506 attr->imm_value = imm_value;
510 * Returns the fpaConst value
512 tarval *get_fpaConst_value(const ir_node *node) {
513 const arm_fpaConst_attr_t *attr = get_arm_fpaConst_attr_const(node);
518 * Sets the tarval value
520 void set_fpaConst_value(ir_node *node, tarval *tv) {
521 arm_fpaConst_attr_t *attr = get_arm_fpaConst_attr(node);
526 * Returns the proj num
528 int get_arm_CondJmp_proj_num(const ir_node *node) {
529 const arm_CondJmp_attr_t *attr = get_arm_CondJmp_attr_const(node);
530 return attr->proj_num;
536 void set_arm_CondJmp_proj_num(ir_node *node, int proj_num) {
537 arm_CondJmp_attr_t *attr = get_arm_CondJmp_attr(node);
538 attr->proj_num = proj_num;
542 * Returns the SymConst label
544 ident *get_arm_symconst_id(const ir_node *node) {
545 const arm_SymConst_attr_t *attr = get_arm_SymConst_attr_const(node);
546 return attr->symconst_id;
550 * Sets the SymConst label
552 void set_arm_symconst_id(ir_node *node, ident *symconst_id) {
553 arm_SymConst_attr_t *attr = get_arm_SymConst_attr(node);
554 attr->symconst_id = symconst_id;
558 * Returns the number of projs of a SwitchJmp.
560 int get_arm_SwitchJmp_n_projs(const ir_node *node) {
561 const arm_SwitchJmp_attr_t *attr = get_arm_SwitchJmp_attr_const(node);
562 return attr->n_projs;
566 * Sets the number of projs.
568 void set_arm_SwitchJmp_n_projs(ir_node *node, int n_projs) {
569 arm_SwitchJmp_attr_t *attr = get_arm_SwitchJmp_attr(node);
570 attr->n_projs = n_projs;
574 * Returns the default_proj_num.
576 long get_arm_SwitchJmp_default_proj_num(const ir_node *node) {
577 const arm_SwitchJmp_attr_t *attr = get_arm_SwitchJmp_attr_const(node);
578 return attr->default_proj_num;
582 * Sets the default_proj_num.
584 void set_arm_SwitchJmp_default_proj_num(ir_node *node, long default_proj_num) {
585 arm_SwitchJmp_attr_t *attr = get_arm_SwitchJmp_attr(node);
586 attr->default_proj_num = default_proj_num;
590 * Gets the shift modifier attribute.
592 arm_shift_modifier get_arm_shift_modifier(const ir_node *node) {
593 const arm_attr_t *attr = get_arm_attr_const(node);
594 return ARM_GET_SHF_MOD(attr);
597 /* Set the ARM machine node attributes to default values. */
598 static void init_arm_attributes(ir_node *node, int flags,
599 const arch_register_req_t ** in_reqs,
600 const arch_register_req_t ** out_reqs,
601 const be_execution_unit_t ***execution_units,
603 ir_graph *irg = get_irn_irg(node);
604 struct obstack *obst = get_irg_obstack(irg);
605 arm_attr_t *attr = get_arm_attr(node);
606 (void) execution_units;
608 attr->in_req = in_reqs;
609 attr->out_req = out_reqs;
611 attr->instr_fl = (ARM_COND_AL << 3) | ARM_SHF_NONE;
614 attr->out_flags = NEW_ARR_D(int, obst, n_res);
615 memset(attr->out_flags, 0, n_res * sizeof(attr->out_flags[0]));
617 attr->slots = NEW_ARR_D(const arch_register_t*, obst, n_res);
618 memset(attr->slots, 0, n_res * sizeof(attr->slots[0]));
621 /************************************************
623 * / _ \ _ __ | |_(_)_ __ ___ (_)_______ _ __ *
624 * | | | | '_ \| __| | '_ ` _ \| |_ / _ \ '__| *
625 * | |_| | |_) | |_| | | | | | | |/ / __/ | *
626 * \___/| .__/ \__|_|_| |_| |_|_/___\___|_| *
628 ************************************************/
630 typedef struct _opt_tuple {
631 ir_op *op_imm_left; /**< immediate is left */
632 ir_op *op_imm_right; /**< immediate is right */
633 ir_op *op_shf_left; /**< shift operand on left */
634 ir_op *op_shf_right; /**< shift operand on right */
637 //static const opt_tuple *opt_ops[iro_arm_last];
639 void arm_set_optimizers(void) {
641 #define STD(op) p_##op = { op_arm_##op##_i, op_arm_##op##_i, op_arm_##op, op_arm_##op }
642 #define LEFT(op) p_##op = { op_arm_##op##_i, NULL, op_arm_##op, NULL }
643 #define SET(op) opt_ops[iro_arm_##op] = &p_##op;
645 static const opt_tuple
654 p_Sub = { op_arm_Sub_i, op_arm_Rsb_i, op_arm_Sub, op_arm_Rsb },
656 memset(opt_ops, 0, sizeof(opt_ops));
669 static int cmp_attr_arm(ir_node *a, ir_node *b) {
670 arm_attr_t *attr_a = get_irn_generic_attr(a);
671 arm_attr_t *attr_b = get_irn_generic_attr(b);
672 return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->imm_value != attr_b->imm_value);
675 static int cmp_attr_arm_SymConst(ir_node *a, ir_node *b) {
676 const arm_SymConst_attr_t *attr_a;
677 const arm_SymConst_attr_t *attr_b;
679 if (cmp_attr_arm(a, b))
682 attr_a = get_irn_generic_attr_const(a);
683 attr_b = get_irn_generic_attr_const(b);
684 return attr_a->symconst_id != attr_b->symconst_id;
687 static int cmp_attr_arm_CondJmp(ir_node *a, ir_node *b) {
690 /* never identical */
694 static int cmp_attr_arm_SwitchJmp(ir_node *a, ir_node *b) {
697 /* never identical */
701 static int cmp_attr_arm_fpaConst(ir_node *a, ir_node *b) {
702 const arm_fpaConst_attr_t *attr_a;
703 const arm_fpaConst_attr_t *attr_b;
705 if (cmp_attr_arm(a, b))
708 attr_a = get_arm_fpaConst_attr_const(a);
709 attr_b = get_arm_fpaConst_attr_const(b);
711 return attr_a->tv != attr_b->tv;
714 /** copies the ARM attributes of a node. */
715 static void arm_copy_attr(const ir_node *old_node, ir_node *new_node) {
716 ir_graph *irg = get_irn_irg(new_node);
717 struct obstack *obst = get_irg_obstack(irg);
718 const arm_attr_t *attr_old = get_arm_attr_const(old_node);
719 arm_attr_t *attr_new = get_arm_attr(new_node);
721 /* copy the attributes */
722 memcpy(attr_new, attr_old, get_op_attr_size(get_irn_op(old_node)));
725 attr_new->out_flags =
726 DUP_ARR_D(int, obst, attr_old->out_flags);
727 /* copy register assignments */
729 DUP_ARR_D(arch_register_t*, obst, attr_old->slots);
734 /* Include the generated constructor functions */
735 #include "gen_arm_new_nodes.c.inl"