2 * Copyright (C) 1995-2007 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief This file implements the creation of the architecture specific firm
23 * opcodes and the corresponding node constructors for the arm
25 * @author Oliver Richter, Tobias Gneist
35 #include "irgraph_t.h"
41 #include "firm_common_t.h"
46 #include "../bearch_t.h"
48 #include "arm_nodes_attr.h"
49 #include "arm_new_nodes.h"
52 #include "bearch_arm_t.h"
55 * Returns the shift modifier string.
57 const char *arm_shf_mod_name(arm_shift_modifier mod) {
58 static const char *names[] = { NULL, NULL, "asr", "lsl", "lsr", "ror", "rrx" };
62 /***********************************************************************************
65 * __| |_ _ _ __ ___ _ __ ___ _ __ _ _ __ | |_ ___ _ __| |_ __ _ ___ ___
66 * / _` | | | | '_ ` _ \| '_ \ / _ \ '__| | | '_ \| __/ _ \ '__| _/ _` |/ __/ _ \
67 * | (_| | |_| | | | | | | |_) | __/ | | | | | | || __/ | | || (_| | (_| __/
68 * \__,_|\__,_|_| |_| |_| .__/ \___|_| |_|_| |_|\__\___|_| |_| \__,_|\___\___|
71 ***********************************************************************************/
74 * Dumps the register requirements for either in or out.
76 static void dump_reg_req(FILE *F, const ir_node *node,
77 const arch_register_req_t **reqs, int inout) {
78 char *dir = inout ? "out" : "in";
79 int max = inout ? get_arm_n_res(node) : get_irn_arity(node);
83 memset(buf, 0, sizeof(buf));
86 for (i = 0; i < max; i++) {
87 fprintf(F, "%sreq #%d =", dir, i);
89 if (reqs[i]->type == arch_register_req_type_none) {
93 if (reqs[i]->type & arch_register_req_type_normal) {
94 fprintf(F, " %s", reqs[i]->cls->name);
97 if (reqs[i]->type & arch_register_req_type_limited) {
99 arch_register_req_format(buf, sizeof(buf), reqs[i], node));
102 if (reqs[i]->type & arch_register_req_type_should_be_same) {
103 ir_fprintf(F, " same as %+F", get_irn_n(node, reqs[i]->other_same));
106 if (reqs[i]->type & arch_register_req_type_should_be_different) {
107 ir_fprintf(F, " different from %+F", get_irn_n(node, reqs[i]->other_different));
115 fprintf(F, "%sreq = N/A\n", dir);
120 * Dumper interface for dumping arm nodes in vcg.
121 * @param n the node to dump
122 * @param F the output file
123 * @param reason indicates which kind of information should be dumped
124 * @return 0 on success or != 0 on failure
126 static int arm_dump_node(ir_node *n, FILE *F, dump_reason_t reason) {
127 ir_mode *mode = NULL;
130 arm_attr_t *attr = get_arm_attr(n);
131 const arch_register_req_t **reqs;
132 const arch_register_t **slots;
133 arm_shift_modifier mod;
136 case dump_node_opcode_txt:
137 fprintf(F, "%s", get_irn_opname(n));
140 case dump_node_mode_txt:
141 mode = get_irn_mode(n);
144 fprintf(F, "[%s]", get_mode_name(mode));
147 fprintf(F, "[?NOMODE?]");
151 case dump_node_nodeattr_txt:
152 mod = ARM_GET_SHF_MOD(attr);
153 if (ARM_HAS_SHIFT(mod)) {
154 fprintf(F, "[%s #%ld]", arm_shf_mod_name(mod), get_tarval_long(attr->value));
156 else if (mod == ARM_SHF_IMM) {
158 fprintf(F, "[#0x%X]", arm_decode_imm_w_shift(attr->value));
162 case dump_node_info_txt:
163 fprintf(F, "=== arm attr begin ===\n");
165 /* dump IN requirements */
166 if (get_irn_arity(n) > 0) {
167 reqs = get_arm_in_req_all(n);
168 dump_reg_req(F, n, reqs, 0);
171 /* dump OUT requirements */
172 if (ARR_LEN(attr->slots) > 0) {
173 reqs = get_arm_out_req_all(n);
174 dump_reg_req(F, n, reqs, 1);
177 /* dump assigned registers */
178 slots = get_arm_slots(n);
179 if (slots && ARR_LEN(attr->slots) > 0) {
180 for (i = 0; i < ARR_LEN(attr->slots); i++) {
182 fprintf(F, "reg #%d = %s\n", i, slots[i]->name);
185 fprintf(F, "reg #%d = n/a\n", i);
192 fprintf(F, "n_res = %d\n", get_arm_n_res(n));
195 fprintf(F, "flags =");
196 if (attr->flags == arch_irn_flags_none) {
200 if (attr->flags & arch_irn_flags_dont_spill) {
201 fprintf(F, " unspillable");
203 if (attr->flags & arch_irn_flags_rematerializable) {
204 fprintf(F, " remat");
206 if (attr->flags & arch_irn_flags_ignore) {
207 fprintf(F, " ignore");
210 fprintf(F, " (%d)\n", attr->flags);
212 if (get_arm_value(n)) {
213 if (is_arm_CopyB(n)) {
214 fprintf(F, "size = %lu\n", get_tarval_long(get_arm_value(n)));
216 if (mode_is_float(get_irn_mode(n))) {
217 fprintf(F, "float value = (%f)\n", (double) get_tarval_double(get_arm_value(n)));
218 } else if (mode_is_int(get_irn_mode(n))) {
219 long v = get_tarval_long(get_arm_value(n));
220 fprintf(F, "long value = %ld (0x%08lx)\n", v, v);
221 } else if (mode_is_reference(get_irn_mode(n))) {
222 fprintf(F, "pointer\n");
224 assert(0 && "unbehandelter Typ im const-Knoten");
228 if (is_arm_CmpBra(n) && get_arm_CondJmp_proj_num(n) >= 0) {
229 fprintf(F, "proj_num = (%d)\n", get_arm_CondJmp_proj_num(n));
231 /* TODO: dump all additional attributes */
233 fprintf(F, "=== arm attr end ===\n");
234 /* end of: case dump_node_info_txt */
242 /***************************************************************************************************
244 * | | | | | | / / | | | | | | | |
245 * __ _| |_| |_ _ __ ___ ___| |_ / /_ _ ___| |_ _ __ ___ ___| |_| |__ ___ __| |___
246 * / _` | __| __| '__| / __|/ _ \ __| / / _` |/ _ \ __| | '_ ` _ \ / _ \ __| '_ \ / _ \ / _` / __|
247 * | (_| | |_| |_| | \__ \ __/ |_ / / (_| | __/ |_ | | | | | | __/ |_| | | | (_) | (_| \__ \
248 * \__,_|\__|\__|_| |___/\___|\__/_/ \__, |\___|\__| |_| |_| |_|\___|\__|_| |_|\___/ \__,_|___/
251 ***************************************************************************************************/
253 /* Returns the attributes of a generic Arm node. */
254 arm_attr_t *get_arm_attr(ir_node *node) {
255 assert(is_arm_irn(node) && "need arm node to get attributes");
256 return get_irn_generic_attr(node);
259 const arm_attr_t *get_arm_attr_const(const ir_node *node) {
260 assert(is_arm_irn(node) && "need arm node to get attributes");
261 return get_irn_generic_attr_const(node);
265 * Returns the attributes of an ARM SymConst node.
267 arm_SymConst_attr_t *get_arm_SymConst_attr(ir_node *node) {
268 assert(is_arm_SymConst(node));
269 return get_irn_generic_attr(node);
272 const arm_SymConst_attr_t *get_arm_SymConst_attr_const(const ir_node *node) {
273 assert(is_arm_SymConst(node));
274 return get_irn_generic_attr_const(node);
277 /* Returns the attributes of a CondJmp node. */
278 arm_CondJmp_attr_t *get_arm_CmpBra_attr(ir_node *node) {
279 assert(is_arm_CmpBra(node));
280 return get_irn_generic_attr(node);
283 const arm_CondJmp_attr_t *get_arm_CmpBra_attr_const(const ir_node *node) {
284 assert(is_arm_CmpBra(node));
285 return get_irn_generic_attr_const(node);
288 /* Returns the attributes of a SwitchJmp node. */
289 arm_SwitchJmp_attr_t *get_arm_SwitchJmp_attr(ir_node *node) {
290 assert(is_arm_SwitchJmp(node));
291 return get_irn_generic_attr(node);
294 const arm_SwitchJmp_attr_t *get_arm_SwitchJmp_attr_const(const ir_node *node) {
295 assert(is_arm_SwitchJmp(node));
296 return get_irn_generic_attr_const(node);
300 * Returns the argument register requirements of a arm node.
302 const arch_register_req_t **get_arm_in_req_all(const ir_node *node) {
303 const arm_attr_t *attr = get_arm_attr_const(node);
308 * Returns the result register requirements of an arm node.
310 const arch_register_req_t **get_arm_out_req_all(const ir_node *node) {
311 const arm_attr_t *attr = get_arm_attr_const(node);
312 return attr->out_req;
316 * Returns the argument register requirement at position pos of an arm node.
318 const arch_register_req_t *get_arm_in_req(const ir_node *node, int pos) {
319 const arm_attr_t *attr = get_arm_attr_const(node);
320 return attr->in_req[pos];
324 * Returns the result register requirement at position pos of an arm node.
326 const arch_register_req_t *get_arm_out_req(const ir_node *node, int pos) {
327 const arm_attr_t *attr = get_arm_attr_const(node);
328 return attr->out_req[pos];
332 * Sets the OUT register requirements at position pos.
334 void set_arm_req_out(ir_node *node, const arch_register_req_t *req, int pos) {
335 arm_attr_t *attr = get_arm_attr(node);
336 attr->out_req[pos] = req;
340 * Sets the complete OUT requirements of node.
342 void set_arm_req_out_all(ir_node *node, const arch_register_req_t **reqs) {
343 arm_attr_t *attr = get_arm_attr(node);
344 attr->out_req = reqs;
348 * Sets the IN register requirements at position pos.
350 void set_arm_req_in(ir_node *node, const arch_register_req_t *req, int pos) {
351 arm_attr_t *attr = get_arm_attr(node);
352 attr->in_req[pos] = req;
356 * Returns the register flag of an arm node.
358 arch_irn_flags_t get_arm_flags(const ir_node *node) {
359 const arm_attr_t *attr = get_arm_attr_const(node);
364 * Sets the register flag of an arm node.
366 void set_arm_flags(ir_node *node, arch_irn_flags_t flags) {
367 arm_attr_t *attr = get_arm_attr(node);
372 * Returns the result register slots of an arm node.
374 const arch_register_t **get_arm_slots(const ir_node *node) {
375 const arm_attr_t *attr = get_arm_attr_const(node);
380 * Returns the name of the OUT register at position pos.
382 const char *get_arm_out_reg_name(const ir_node *node, int pos) {
383 const arm_attr_t *attr = get_arm_attr_const(node);
385 assert(is_arm_irn(node) && "Not an arm node.");
386 assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position.");
387 assert(attr->slots[pos] && "No register assigned");
389 return arch_register_get_name(attr->slots[pos]);
393 * Returns the index of the OUT register at position pos within its register class.
395 int get_arm_out_regnr(const ir_node *node, int pos) {
396 const arm_attr_t *attr = get_arm_attr_const(node);
398 assert(is_arm_irn(node) && "Not an arm node.");
399 assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position.");
400 assert(attr->slots[pos] && "No register assigned");
402 return arch_register_get_index(attr->slots[pos]);
406 * Returns the OUT register at position pos.
408 const arch_register_t *get_arm_out_reg(const ir_node *node, int pos) {
409 const arm_attr_t *attr = get_arm_attr_const(node);
411 assert(is_arm_irn(node) && "Not an arm node.");
412 assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position.");
413 assert(attr->slots[pos] && "No register assigned");
415 return attr->slots[pos];
419 * Sets the flags for the n'th out.
421 void set_arm_out_flags(ir_node *node, arch_irn_flags_t flags, int pos) {
422 arm_attr_t *attr = get_arm_attr(node);
423 assert(pos < ARR_LEN(attr->out_flags) && "Invalid OUT position.");
424 attr->out_flags[pos] = flags;
428 * Gets the flags for the n'th out.
430 arch_irn_flags_t get_arm_out_flags(const ir_node *node, int pos) {
431 const arm_attr_t *attr = get_arm_attr_const(node);
432 assert(pos < ARR_LEN(attr->out_flags) && "Invalid OUT position.");
433 return attr->out_flags[pos];
437 * Returns the number of results.
439 int get_arm_n_res(const ir_node *node) {
440 const arm_attr_t *attr = get_arm_attr_const(node);
441 return ARR_LEN(attr->slots);
444 * Returns the tarvalue
446 tarval *get_arm_value(const ir_node *node) {
447 const arm_attr_t *attr = get_arm_attr_const(node);
454 void set_arm_value(ir_node *node, tarval *tv) {
455 arm_attr_t *attr = get_arm_attr(node);
460 * Returns the proj num
462 int get_arm_CondJmp_proj_num(const ir_node *node) {
463 const arm_CondJmp_attr_t *attr = get_arm_CmpBra_attr_const(node);
464 return attr->proj_num;
470 void set_arm_CondJmp_proj_num(ir_node *node, int proj_num) {
471 arm_CondJmp_attr_t *attr = get_arm_CmpBra_attr(node);
472 attr->proj_num = proj_num;
476 * Returns the SymConst label
478 ident *get_arm_symconst_id(const ir_node *node) {
479 const arm_SymConst_attr_t *attr = get_arm_SymConst_attr_const(node);
480 return attr->symconst_id;
484 * Sets the SymConst label
486 void set_arm_symconst_id(ir_node *node, ident *symconst_id) {
487 arm_SymConst_attr_t *attr = get_arm_SymConst_attr(node);
488 attr->symconst_id = symconst_id;
492 * Returns the number of projs of a SwitchJmp.
494 int get_arm_SwitchJmp_n_projs(const ir_node *node) {
495 const arm_SwitchJmp_attr_t *attr = get_arm_SwitchJmp_attr_const(node);
496 return attr->n_projs;
500 * Sets the number of projs.
502 void set_arm_SwitchJmp_n_projs(ir_node *node, int n_projs) {
503 arm_SwitchJmp_attr_t *attr = get_arm_SwitchJmp_attr(node);
504 attr->n_projs = n_projs;
508 * Returns the default_proj_num.
510 long get_arm_SwitchJmp_default_proj_num(const ir_node *node) {
511 const arm_SwitchJmp_attr_t *attr = get_arm_SwitchJmp_attr_const(node);
512 return attr->default_proj_num;
516 * Sets the default_proj_num.
518 void set_arm_SwitchJmp_default_proj_num(ir_node *node, long default_proj_num) {
519 arm_SwitchJmp_attr_t *attr = get_arm_SwitchJmp_attr(node);
520 attr->default_proj_num = default_proj_num;
524 * Gets the shift modifier attribute.
526 arm_shift_modifier get_arm_shift_modifier(const ir_node *node) {
527 const arm_attr_t *attr = get_arm_attr_const(node);
528 return ARM_GET_SHF_MOD(attr);
531 /* Set the ARM machine node attributes to default values. */
532 static void init_arm_attributes(ir_node *node, int flags,
533 const arch_register_req_t ** in_reqs,
534 const arch_register_req_t ** out_reqs,
535 const be_execution_unit_t ***execution_units,
536 int n_res, unsigned latency) {
537 ir_graph *irg = get_irn_irg(node);
538 struct obstack *obst = get_irg_obstack(irg);
539 arm_attr_t *attr = get_arm_attr(node);
540 (void) execution_units;
543 attr->in_req = in_reqs;
544 attr->out_req = out_reqs;
546 attr->instr_fl = (ARM_COND_AL << 3) | ARM_SHF_NONE;
549 attr->out_flags = NEW_ARR_D(int, obst, n_res);
550 memset(attr->out_flags, 0, n_res * sizeof(attr->out_flags[0]));
552 attr->slots = NEW_ARR_D(const arch_register_t*, obst, n_res);
553 memset(attr->slots, 0, n_res * sizeof(attr->slots[0]));
556 /************************************************
558 * / _ \ _ __ | |_(_)_ __ ___ (_)_______ _ __ *
559 * | | | | '_ \| __| | '_ ` _ \| |_ / _ \ '__| *
560 * | |_| | |_) | |_| | | | | | | |/ / __/ | *
561 * \___/| .__/ \__|_|_| |_| |_|_/___\___|_| *
563 ************************************************/
565 typedef struct _opt_tuple {
566 ir_op *op_imm_left; /**< immediate is left */
567 ir_op *op_imm_right; /**< immediate is right */
568 ir_op *op_shf_left; /**< shift operand on left */
569 ir_op *op_shf_right; /**< shift operand on right */
572 //static const opt_tuple *opt_ops[iro_arm_last];
574 void arm_set_optimizers(void) {
576 #define STD(op) p_##op = { op_arm_##op##_i, op_arm_##op##_i, op_arm_##op, op_arm_##op }
577 #define LEFT(op) p_##op = { op_arm_##op##_i, NULL, op_arm_##op, NULL }
578 #define SET(op) opt_ops[iro_arm_##op] = &p_##op;
580 static const opt_tuple
589 p_Sub = { op_arm_Sub_i, op_arm_Rsb_i, op_arm_Sub, op_arm_Rsb },
591 memset(opt_ops, 0, sizeof(opt_ops));
604 static int cmp_attr_arm_SymConst(ir_node *a, ir_node *b) {
605 const arm_SymConst_attr_t *attr_a = get_irn_generic_attr_const(a);
606 const arm_SymConst_attr_t *attr_b = get_irn_generic_attr_const(b);
607 return attr_a->symconst_id != attr_b->symconst_id;
610 static int cmp_attr_arm(ir_node *a, ir_node *b) {
611 arm_attr_t *attr_a = get_irn_generic_attr(a);
612 arm_attr_t *attr_b = get_irn_generic_attr(b);
613 return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->value != attr_b->value);
616 static int cmp_attr_arm_CondJmp(ir_node *a, ir_node *b) {
619 /* never identical */
623 static int cmp_attr_arm_SwitchJmp(ir_node *a, ir_node *b) {
626 /* never identical */
630 /** copies the ARM attributes of a node. */
631 static void arm_copy_attr(const ir_node *old_node, ir_node *new_node) {
632 ir_graph *irg = get_irn_irg(new_node);
633 struct obstack *obst = get_irg_obstack(irg);
634 const arm_attr_t *attr_old = get_arm_attr_const(old_node);
635 arm_attr_t *attr_new = get_arm_attr(new_node);
637 /* copy the attributes */
638 memcpy(attr_new, attr_old, get_op_attr_size(get_irn_op(old_node)));
641 attr_new->out_flags =
642 DUP_ARR_D(int, obst, attr_old->out_flags);
643 /* copy register assignments */
645 DUP_ARR_D(arch_register_t*, obst, attr_old->slots);
650 /* Include the generated constructor functions */
651 #include "gen_arm_new_nodes.c.inl"