2 * Copyright (C) 1995-2008 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief This file implements the creation of the architecture specific firm
23 * opcodes and the corresponding node constructors for the arm
25 * @author Oliver Richter, Tobias Gneist
35 #include "irgraph_t.h"
41 #include "firm_common_t.h"
46 #include "../bearch_t.h"
48 #include "arm_nodes_attr.h"
49 #include "arm_new_nodes.h"
50 #include "arm_optimize.h"
53 #include "bearch_arm_t.h"
56 * Returns the shift modifier string.
58 const char *arm_shf_mod_name(arm_shift_modifier mod) {
59 static const char *names[] = { NULL, NULL, "asr", "lsl", "lsr", "ror", "rrx" };
64 * Return the fpa immediate from the encoding.
66 const char *arm_get_fpa_imm_name(long imm_value) {
67 static const char *fpa_imm[] = {
77 return fpa_imm[imm_value];
80 /***********************************************************************************
83 * __| |_ _ _ __ ___ _ __ ___ _ __ _ _ __ | |_ ___ _ __| |_ __ _ ___ ___
84 * / _` | | | | '_ ` _ \| '_ \ / _ \ '__| | | '_ \| __/ _ \ '__| _/ _` |/ __/ _ \
85 * | (_| | |_| | | | | | | |_) | __/ | | | | | | || __/ | | || (_| | (_| __/
86 * \__,_|\__,_|_| |_| |_| .__/ \___|_| |_|_| |_|\__\___|_| |_| \__,_|\___\___|
89 ***********************************************************************************/
92 * Dumps the register requirements for either in or out.
94 static void dump_reg_req(FILE *F, const ir_node *node,
95 const arch_register_req_t **reqs, int inout) {
96 char *dir = inout ? "out" : "in";
97 int max = inout ? get_arm_n_res(node) : get_irn_arity(node);
101 memset(buf, 0, sizeof(buf));
104 for (i = 0; i < max; i++) {
105 fprintf(F, "%sreq #%d =", dir, i);
107 if (reqs[i]->type == arch_register_req_type_none) {
111 if (reqs[i]->type & arch_register_req_type_normal) {
112 fprintf(F, " %s", reqs[i]->cls->name);
115 if (reqs[i]->type & arch_register_req_type_limited) {
117 arch_register_req_format(buf, sizeof(buf), reqs[i], node));
120 if (reqs[i]->type & arch_register_req_type_should_be_same) {
121 const unsigned other = reqs[i]->other_same;
124 ir_fprintf(F, " same as");
125 for (i = 0; 1U << i <= other; ++i) {
126 if (other & (1U << i)) {
127 ir_fprintf(F, " %+F", get_irn_n(node, i));
132 if (reqs[i]->type & arch_register_req_type_must_be_different) {
133 const unsigned other = reqs[i]->other_different;
136 ir_fprintf(F, " different from");
137 for (i = 0; 1U << i <= other; ++i) {
138 if (other & (1U << i)) {
139 ir_fprintf(F, " %+F", get_irn_n(node, i));
149 fprintf(F, "%sreq = N/A\n", dir);
154 * Dumper interface for dumping arm nodes in vcg.
155 * @param n the node to dump
156 * @param F the output file
157 * @param reason indicates which kind of information should be dumped
158 * @return 0 on success or != 0 on failure
160 static int arm_dump_node(ir_node *n, FILE *F, dump_reason_t reason) {
161 ir_mode *mode = NULL;
164 arm_attr_t *attr = get_arm_attr(n);
165 const arch_register_req_t **reqs;
166 const arch_register_t **slots;
167 arm_shift_modifier mod;
170 case dump_node_opcode_txt:
171 fprintf(F, "%s", get_irn_opname(n));
174 case dump_node_mode_txt:
175 mode = get_irn_mode(n);
178 fprintf(F, "[%s]", get_mode_name(mode));
181 fprintf(F, "[?NOMODE?]");
185 case dump_node_nodeattr_txt:
186 mod = ARM_GET_SHF_MOD(attr);
187 if (ARM_HAS_SHIFT(mod)) {
188 fprintf(F, "[%s #%ld]", arm_shf_mod_name(mod), attr->imm_value);
190 else if (mod == ARM_SHF_IMM) {
192 fprintf(F, "[#0x%X]", arm_decode_imm_w_shift(attr->imm_value));
196 case dump_node_info_txt:
197 fprintf(F, "=== arm attr begin ===\n");
199 /* dump IN requirements */
200 if (get_irn_arity(n) > 0) {
201 reqs = get_arm_in_req_all(n);
202 dump_reg_req(F, n, reqs, 0);
205 /* dump OUT requirements */
206 if (ARR_LEN(attr->slots) > 0) {
207 reqs = get_arm_out_req_all(n);
208 dump_reg_req(F, n, reqs, 1);
211 /* dump assigned registers */
212 slots = get_arm_slots(n);
213 if (slots && ARR_LEN(attr->slots) > 0) {
214 for (i = 0; i < ARR_LEN(attr->slots); i++) {
216 fprintf(F, "reg #%d = %s\n", i, slots[i]->name);
219 fprintf(F, "reg #%d = n/a\n", i);
226 fprintf(F, "n_res = %d\n", get_arm_n_res(n));
229 fprintf(F, "flags =");
230 if (attr->flags == arch_irn_flags_none) {
234 if (attr->flags & arch_irn_flags_dont_spill) {
235 fprintf(F, " unspillable");
237 if (attr->flags & arch_irn_flags_rematerializable) {
238 fprintf(F, " remat");
240 if (attr->flags & arch_irn_flags_ignore) {
241 fprintf(F, " ignore");
244 fprintf(F, " (%d)\n", attr->flags);
246 if (is_arm_CopyB(n)) {
247 fprintf(F, "size = %lu\n", get_arm_imm_value(n));
249 long v = get_arm_imm_value(n);
250 if (ARM_GET_FPA_IMM(attr)) {
251 fprintf(F, "immediate float value = %s\n", arm_get_fpa_imm_name(v));
253 fprintf(F, "immediate value = %ld (0x%08lx)\n", v, v);
257 if (is_arm_CmpBra(n) && get_arm_CondJmp_proj_num(n) >= 0) {
258 fprintf(F, "proj_num = (%d)\n", get_arm_CondJmp_proj_num(n));
260 /* TODO: dump all additional attributes */
262 fprintf(F, "=== arm attr end ===\n");
263 /* end of: case dump_node_info_txt */
271 /***************************************************************************************************
273 * | | | | | | / / | | | | | | | |
274 * __ _| |_| |_ _ __ ___ ___| |_ / /_ _ ___| |_ _ __ ___ ___| |_| |__ ___ __| |___
275 * / _` | __| __| '__| / __|/ _ \ __| / / _` |/ _ \ __| | '_ ` _ \ / _ \ __| '_ \ / _ \ / _` / __|
276 * | (_| | |_| |_| | \__ \ __/ |_ / / (_| | __/ |_ | | | | | | __/ |_| | | | (_) | (_| \__ \
277 * \__,_|\__|\__|_| |___/\___|\__/_/ \__, |\___|\__| |_| |_| |_|\___|\__|_| |_|\___/ \__,_|___/
280 ***************************************************************************************************/
282 /* Returns the attributes of a generic Arm node. */
283 arm_attr_t *get_arm_attr(ir_node *node) {
284 assert(is_arm_irn(node) && "need arm node to get attributes");
285 return get_irn_generic_attr(node);
288 const arm_attr_t *get_arm_attr_const(const ir_node *node) {
289 assert(is_arm_irn(node) && "need arm node to get attributes");
290 return get_irn_generic_attr_const(node);
294 * Returns the attributes of an ARM SymConst node.
296 arm_SymConst_attr_t *get_arm_SymConst_attr(ir_node *node) {
297 assert(is_arm_SymConst(node));
298 return get_irn_generic_attr(node);
301 const arm_SymConst_attr_t *get_arm_SymConst_attr_const(const ir_node *node) {
302 assert(is_arm_SymConst(node));
303 return get_irn_generic_attr_const(node);
306 static const arm_fpaConst_attr_t *get_arm_fpaConst_attr_const(const ir_node *node) {
307 const arm_attr_t *attr = get_arm_attr_const(node);
308 const arm_fpaConst_attr_t *fpa_attr = CONST_CAST_ARM_ATTR(arm_fpaConst_attr_t, attr);
313 static arm_fpaConst_attr_t *get_arm_fpaConst_attr(ir_node *node) {
314 arm_attr_t *attr = get_arm_attr(node);
315 arm_fpaConst_attr_t *fpa_attr = CAST_ARM_ATTR(arm_fpaConst_attr_t, attr);
320 static int is_arm_CondJmp(const ir_node *node) {
321 int code = get_arm_irn_opcode(node);
323 return (code == iro_arm_CmpBra || code == iro_arm_fpaCmfBra ||
324 code == iro_arm_fpaCnfBra || iro_arm_fpaCmfeBra ||
325 code == iro_arm_fpaCnfeBra);
328 /* Returns the attributes of a CondJmp node. */
329 arm_CondJmp_attr_t *get_arm_CondJmp_attr(ir_node *node) {
330 assert(is_arm_CondJmp(node));
331 return get_irn_generic_attr(node);
334 const arm_CondJmp_attr_t *get_arm_CondJmp_attr_const(const ir_node *node) {
335 assert(is_arm_CondJmp(node));
336 return get_irn_generic_attr_const(node);
339 /* Returns the attributes of a SwitchJmp node. */
340 arm_SwitchJmp_attr_t *get_arm_SwitchJmp_attr(ir_node *node) {
341 assert(is_arm_SwitchJmp(node));
342 return get_irn_generic_attr(node);
345 const arm_SwitchJmp_attr_t *get_arm_SwitchJmp_attr_const(const ir_node *node) {
346 assert(is_arm_SwitchJmp(node));
347 return get_irn_generic_attr_const(node);
351 * Returns the argument register requirements of a arm node.
353 const arch_register_req_t **get_arm_in_req_all(const ir_node *node) {
354 const arm_attr_t *attr = get_arm_attr_const(node);
359 * Returns the result register requirements of an arm node.
361 const arch_register_req_t **get_arm_out_req_all(const ir_node *node) {
362 const arm_attr_t *attr = get_arm_attr_const(node);
363 return attr->out_req;
367 * Returns the argument register requirement at position pos of an arm node.
369 const arch_register_req_t *get_arm_in_req(const ir_node *node, int pos) {
370 const arm_attr_t *attr = get_arm_attr_const(node);
371 return attr->in_req[pos];
375 * Returns the result register requirement at position pos of an arm node.
377 const arch_register_req_t *get_arm_out_req(const ir_node *node, int pos) {
378 const arm_attr_t *attr = get_arm_attr_const(node);
379 return attr->out_req[pos];
383 * Sets the OUT register requirements at position pos.
385 void set_arm_req_out(ir_node *node, const arch_register_req_t *req, int pos) {
386 arm_attr_t *attr = get_arm_attr(node);
387 attr->out_req[pos] = req;
391 * Sets the complete OUT requirements of node.
393 void set_arm_req_out_all(ir_node *node, const arch_register_req_t **reqs) {
394 arm_attr_t *attr = get_arm_attr(node);
395 attr->out_req = reqs;
399 * Sets the IN register requirements at position pos.
401 void set_arm_req_in(ir_node *node, const arch_register_req_t *req, int pos) {
402 arm_attr_t *attr = get_arm_attr(node);
403 attr->in_req[pos] = req;
407 * Returns the register flag of an arm node.
409 arch_irn_flags_t get_arm_flags(const ir_node *node) {
410 const arm_attr_t *attr = get_arm_attr_const(node);
415 * Sets the register flag of an arm node.
417 void set_arm_flags(ir_node *node, arch_irn_flags_t flags) {
418 arm_attr_t *attr = get_arm_attr(node);
423 * Returns the result register slots of an arm node.
425 const arch_register_t **get_arm_slots(const ir_node *node) {
426 const arm_attr_t *attr = get_arm_attr_const(node);
431 * Returns the name of the OUT register at position pos.
433 const char *get_arm_out_reg_name(const ir_node *node, int pos) {
434 const arm_attr_t *attr = get_arm_attr_const(node);
436 assert(is_arm_irn(node) && "Not an arm node.");
437 assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position.");
438 assert(attr->slots[pos] && "No register assigned");
440 return arch_register_get_name(attr->slots[pos]);
444 * Returns the index of the OUT register at position pos within its register class.
446 int get_arm_out_regnr(const ir_node *node, int pos) {
447 const arm_attr_t *attr = get_arm_attr_const(node);
449 assert(is_arm_irn(node) && "Not an arm node.");
450 assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position.");
451 assert(attr->slots[pos] && "No register assigned");
453 return arch_register_get_index(attr->slots[pos]);
457 * Returns the OUT register at position pos.
459 const arch_register_t *get_arm_out_reg(const ir_node *node, int pos) {
460 const arm_attr_t *attr = get_arm_attr_const(node);
462 assert(is_arm_irn(node) && "Not an arm node.");
463 assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position.");
464 assert(attr->slots[pos] && "No register assigned");
466 return attr->slots[pos];
470 * Sets the flags for the n'th out.
472 void set_arm_out_flags(ir_node *node, arch_irn_flags_t flags, int pos) {
473 arm_attr_t *attr = get_arm_attr(node);
474 assert(pos < ARR_LEN(attr->out_flags) && "Invalid OUT position.");
475 attr->out_flags[pos] = flags;
479 * Gets the flags for the n'th out.
481 arch_irn_flags_t get_arm_out_flags(const ir_node *node, int pos) {
482 const arm_attr_t *attr = get_arm_attr_const(node);
483 assert(pos < ARR_LEN(attr->out_flags) && "Invalid OUT position.");
484 return attr->out_flags[pos];
488 * Returns the number of results.
490 int get_arm_n_res(const ir_node *node) {
491 const arm_attr_t *attr = get_arm_attr_const(node);
492 return ARR_LEN(attr->slots);
496 * Returns the immediate value
498 long get_arm_imm_value(const ir_node *node) {
499 const arm_attr_t *attr = get_arm_attr_const(node);
500 return attr->imm_value;
504 * Sets the tarval value
506 void set_arm_imm_value(ir_node *node, long imm_value) {
507 arm_attr_t *attr = get_arm_attr(node);
508 attr->imm_value = imm_value;
512 * Returns the fpaConst value
514 tarval *get_fpaConst_value(const ir_node *node) {
515 const arm_fpaConst_attr_t *attr = get_arm_fpaConst_attr_const(node);
520 * Sets the tarval value
522 void set_fpaConst_value(ir_node *node, tarval *tv) {
523 arm_fpaConst_attr_t *attr = get_arm_fpaConst_attr(node);
528 * Returns the proj num
530 int get_arm_CondJmp_proj_num(const ir_node *node) {
531 const arm_CondJmp_attr_t *attr = get_arm_CondJmp_attr_const(node);
532 return attr->proj_num;
538 void set_arm_CondJmp_proj_num(ir_node *node, int proj_num) {
539 arm_CondJmp_attr_t *attr = get_arm_CondJmp_attr(node);
540 attr->proj_num = proj_num;
544 * Returns the SymConst label
546 ident *get_arm_symconst_id(const ir_node *node) {
547 const arm_SymConst_attr_t *attr = get_arm_SymConst_attr_const(node);
548 return attr->symconst_id;
552 * Sets the SymConst label
554 void set_arm_symconst_id(ir_node *node, ident *symconst_id) {
555 arm_SymConst_attr_t *attr = get_arm_SymConst_attr(node);
556 attr->symconst_id = symconst_id;
560 * Returns the number of projs of a SwitchJmp.
562 int get_arm_SwitchJmp_n_projs(const ir_node *node) {
563 const arm_SwitchJmp_attr_t *attr = get_arm_SwitchJmp_attr_const(node);
564 return attr->n_projs;
568 * Sets the number of projs.
570 void set_arm_SwitchJmp_n_projs(ir_node *node, int n_projs) {
571 arm_SwitchJmp_attr_t *attr = get_arm_SwitchJmp_attr(node);
572 attr->n_projs = n_projs;
576 * Returns the default_proj_num.
578 long get_arm_SwitchJmp_default_proj_num(const ir_node *node) {
579 const arm_SwitchJmp_attr_t *attr = get_arm_SwitchJmp_attr_const(node);
580 return attr->default_proj_num;
584 * Sets the default_proj_num.
586 void set_arm_SwitchJmp_default_proj_num(ir_node *node, long default_proj_num) {
587 arm_SwitchJmp_attr_t *attr = get_arm_SwitchJmp_attr(node);
588 attr->default_proj_num = default_proj_num;
592 * Gets the shift modifier attribute.
594 arm_shift_modifier get_arm_shift_modifier(const ir_node *node) {
595 const arm_attr_t *attr = get_arm_attr_const(node);
596 return ARM_GET_SHF_MOD(attr);
599 /* Set the ARM machine node attributes to default values. */
600 static void init_arm_attributes(ir_node *node, int flags,
601 const arch_register_req_t ** in_reqs,
602 const arch_register_req_t ** out_reqs,
603 const be_execution_unit_t ***execution_units,
605 ir_graph *irg = get_irn_irg(node);
606 struct obstack *obst = get_irg_obstack(irg);
607 arm_attr_t *attr = get_arm_attr(node);
608 (void) execution_units;
610 attr->in_req = in_reqs;
611 attr->out_req = out_reqs;
613 attr->instr_fl = (ARM_COND_AL << 3) | ARM_SHF_NONE;
616 attr->out_flags = NEW_ARR_D(int, obst, n_res);
617 memset(attr->out_flags, 0, n_res * sizeof(attr->out_flags[0]));
619 attr->slots = NEW_ARR_D(const arch_register_t*, obst, n_res);
620 memset(attr->slots, 0, n_res * sizeof(attr->slots[0]));
623 /************************************************
625 * / _ \ _ __ | |_(_)_ __ ___ (_)_______ _ __ *
626 * | | | | '_ \| __| | '_ ` _ \| |_ / _ \ '__| *
627 * | |_| | |_) | |_| | | | | | | |/ / __/ | *
628 * \___/| .__/ \__|_|_| |_| |_|_/___\___|_| *
630 ************************************************/
632 typedef struct _opt_tuple {
633 ir_op *op_imm_left; /**< immediate is left */
634 ir_op *op_imm_right; /**< immediate is right */
635 ir_op *op_shf_left; /**< shift operand on left */
636 ir_op *op_shf_right; /**< shift operand on right */
639 //static const opt_tuple *opt_ops[iro_arm_last];
641 void arm_set_optimizers(void) {
643 #define STD(op) p_##op = { op_arm_##op##_i, op_arm_##op##_i, op_arm_##op, op_arm_##op }
644 #define LEFT(op) p_##op = { op_arm_##op##_i, NULL, op_arm_##op, NULL }
645 #define SET(op) opt_ops[iro_arm_##op] = &p_##op;
647 static const opt_tuple
656 p_Sub = { op_arm_Sub_i, op_arm_Rsb_i, op_arm_Sub, op_arm_Rsb },
658 memset(opt_ops, 0, sizeof(opt_ops));
671 static int cmp_attr_arm(ir_node *a, ir_node *b) {
672 arm_attr_t *attr_a = get_irn_generic_attr(a);
673 arm_attr_t *attr_b = get_irn_generic_attr(b);
674 return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->imm_value != attr_b->imm_value);
677 static int cmp_attr_arm_SymConst(ir_node *a, ir_node *b) {
678 const arm_SymConst_attr_t *attr_a;
679 const arm_SymConst_attr_t *attr_b;
681 if (cmp_attr_arm(a, b))
684 attr_a = get_irn_generic_attr_const(a);
685 attr_b = get_irn_generic_attr_const(b);
686 return attr_a->symconst_id != attr_b->symconst_id;
689 static int cmp_attr_arm_CondJmp(ir_node *a, ir_node *b) {
692 /* never identical */
696 static int cmp_attr_arm_SwitchJmp(ir_node *a, ir_node *b) {
699 /* never identical */
703 static int cmp_attr_arm_fpaConst(ir_node *a, ir_node *b) {
704 const arm_fpaConst_attr_t *attr_a;
705 const arm_fpaConst_attr_t *attr_b;
707 if (cmp_attr_arm(a, b))
710 attr_a = get_arm_fpaConst_attr_const(a);
711 attr_b = get_arm_fpaConst_attr_const(b);
713 return attr_a->tv != attr_b->tv;
716 /** copies the ARM attributes of a node. */
717 static void arm_copy_attr(const ir_node *old_node, ir_node *new_node) {
718 ir_graph *irg = get_irn_irg(new_node);
719 struct obstack *obst = get_irg_obstack(irg);
720 const arm_attr_t *attr_old = get_arm_attr_const(old_node);
721 arm_attr_t *attr_new = get_arm_attr(new_node);
723 /* copy the attributes */
724 memcpy(attr_new, attr_old, get_op_attr_size(get_irn_op(old_node)));
727 attr_new->out_flags =
728 DUP_ARR_D(int, obst, attr_old->out_flags);
729 /* copy register assignments */
731 DUP_ARR_D(arch_register_t*, obst, attr_old->slots);
736 /* Include the generated constructor functions */
737 #include "gen_arm_new_nodes.c.inl"