2 * This file implements the creation of the architecture specific firm opcodes
3 * and the corresponding node constructors for the arm assembler irg.
21 #include "irgraph_t.h"
27 #include "firm_common_t.h"
31 #include "../bearch.h"
33 #include "arm_nodes_attr.h"
34 #include "arm_new_nodes.h"
35 #include "gen_arm_regalloc_if.h"
38 #include "bearch_arm_t.h"
41 * Returns the shift modifier string.
43 const char *arm_shf_mod_name(arm_shift_modifier mod) {
44 static const char *names[] = { NULL, NULL, "asr", "lsl", "lsr", "ror", "rrx" };
48 /***********************************************************************************
51 * __| |_ _ _ __ ___ _ __ ___ _ __ _ _ __ | |_ ___ _ __| |_ __ _ ___ ___
52 * / _` | | | | '_ ` _ \| '_ \ / _ \ '__| | | '_ \| __/ _ \ '__| _/ _` |/ __/ _ \
53 * | (_| | |_| | | | | | | |_) | __/ | | | | | | || __/ | | || (_| | (_| __/
54 * \__,_|\__,_|_| |_| |_| .__/ \___|_| |_|_| |_|\__\___|_| |_| \__,_|\___\___|
57 ***********************************************************************************/
60 * Returns a string containing the names of all registers within the limited bitset
62 static char *get_limited_regs(const arch_register_req_t *req, char *buf, int max) {
63 bitset_t *bs = bitset_alloca(req->cls->n_regs);
68 req->limited(NULL, bs);
70 for (i = 0; i < req->cls->n_regs; i++) {
71 if (bitset_is_set(bs, i)) {
72 cnt = snprintf(p, max - size, " %s", req->cls->regs[i].name);
74 fprintf(stderr, "dumper problem, exiting\n");
90 * Dumps the register requirements for either in or out.
92 static void dump_reg_req(FILE *F, ir_node *n, const arm_register_req_t **reqs, int inout) {
93 char *dir = inout ? "out" : "in";
94 int max = inout ? get_arm_n_res(n) : get_irn_arity(n);
95 char *buf = alloca(1024);
101 for (i = 0; i < max; i++) {
102 fprintf(F, "%sreq #%d =", dir, i);
104 if (reqs[i]->req.type == arch_register_req_type_none) {
108 if (reqs[i]->req.type & arch_register_req_type_normal) {
109 fprintf(F, " %s", reqs[i]->req.cls->name);
112 if (reqs[i]->req.type & arch_register_req_type_limited) {
113 fprintf(F, " %s", get_limited_regs(&reqs[i]->req, buf, 1024));
116 if (reqs[i]->req.type & arch_register_req_type_should_be_same) {
117 ir_fprintf(F, " same as %+F", get_irn_n(n, reqs[i]->same_pos));
120 if (reqs[i]->req.type & arch_register_req_type_should_be_different) {
121 ir_fprintf(F, " different from %+F", get_irn_n(n, reqs[i]->different_pos));
130 fprintf(F, "%sreq = N/A\n", dir);
135 * Dumper interface for dumping arm nodes in vcg.
136 * @param n the node to dump
137 * @param F the output file
138 * @param reason indicates which kind of information should be dumped
139 * @return 0 on success or != 0 on failure
141 static int arm_dump_node(ir_node *n, FILE *F, dump_reason_t reason) {
142 ir_mode *mode = NULL;
145 arm_attr_t *attr = get_arm_attr(n);
146 const arm_register_req_t **reqs;
147 const arch_register_t **slots;
148 arm_shift_modifier mod;
151 case dump_node_opcode_txt:
152 fprintf(F, "%s", get_irn_opname(n));
155 case dump_node_mode_txt:
156 mode = get_irn_mode(n);
159 fprintf(F, "[%s]", get_mode_name(mode));
162 fprintf(F, "[?NOMODE?]");
166 case dump_node_nodeattr_txt:
167 mod = ARM_GET_SHF_MOD(attr);
168 if (ARM_HAS_SHIFT(mod)) {
169 fprintf(F, "[%s #%ld]", arm_shf_mod_name(mod), get_tarval_long(attr->value));
171 else if (mod == ARM_SHF_IMM) {
173 fprintf(F, "[#0x%X]", arm_decode_imm_w_shift(attr->value));
177 case dump_node_info_txt:
178 fprintf(F, "=== arm attr begin ===\n");
180 /* dump IN requirements */
181 if (get_irn_arity(n) > 0) {
182 reqs = get_arm_in_req_all(n);
183 dump_reg_req(F, n, reqs, 0);
186 /* dump OUT requirements */
187 if (attr->n_res > 0) {
188 reqs = get_arm_out_req_all(n);
189 dump_reg_req(F, n, reqs, 1);
192 /* dump assigned registers */
193 slots = get_arm_slots(n);
194 if (slots && attr->n_res > 0) {
195 for (i = 0; i < attr->n_res; i++) {
197 fprintf(F, "reg #%d = %s\n", i, slots[i]->name);
200 fprintf(F, "reg #%d = n/a\n", i);
207 fprintf(F, "n_res = %d\n", get_arm_n_res(n));
210 fprintf(F, "flags =");
211 if (attr->flags == arch_irn_flags_none) {
215 if (attr->flags & arch_irn_flags_dont_spill) {
216 fprintf(F, " unspillable");
218 if (attr->flags & arch_irn_flags_rematerializable) {
219 fprintf(F, " remat");
221 if (attr->flags & arch_irn_flags_ignore) {
222 fprintf(F, " ignore");
225 fprintf(F, " (%d)\n", attr->flags);
227 if (get_arm_value(n)) {
228 if (is_arm_CopyB(n)) {
229 fprintf(F, "size = %u\n", get_tarval_long(get_arm_value(n)));
231 if (mode_is_float(get_irn_mode(n))) {
232 fprintf(F, "float value = (%lf)\n", get_tarval_double(get_arm_value(n)));
233 } else if (mode_is_int(get_irn_mode(n))) {
234 long v = get_tarval_long(get_arm_value(n));
235 fprintf(F, "long value = %ld (0x%08lx)\n", v, v);
236 } else if (mode_is_reference(get_irn_mode(n))) {
237 fprintf(F, "pointer\n");
239 assert(0 && "unbehandelter Typ im const-Knoten");
243 if (get_arm_proj_num(n) >= 0) {
244 fprintf(F, "proj_num = (%d)\n", get_arm_proj_num(n));
246 /* TODO: dump all additional attributes */
248 fprintf(F, "=== arm attr end ===\n");
249 /* end of: case dump_node_info_txt */
257 /***************************************************************************************************
259 * | | | | | | / / | | | | | | | |
260 * __ _| |_| |_ _ __ ___ ___| |_ / /_ _ ___| |_ _ __ ___ ___| |_| |__ ___ __| |___
261 * / _` | __| __| '__| / __|/ _ \ __| / / _` |/ _ \ __| | '_ ` _ \ / _ \ __| '_ \ / _ \ / _` / __|
262 * | (_| | |_| |_| | \__ \ __/ |_ / / (_| | __/ |_ | | | | | | __/ |_| | | | (_) | (_| \__ \
263 * \__,_|\__|\__|_| |___/\___|\__/_/ \__, |\___|\__| |_| |_| |_|\___|\__|_| |_|\___/ \__,_|___/
266 ***************************************************************************************************/
269 * Wraps get_irn_generic_attr() as it takes no const ir_node, so we need to do a cast.
270 * Firm was made by people hating const :-(
272 arm_attr_t *get_arm_attr(const ir_node *node) {
273 assert(is_arm_irn(node) && "need arm node to get attributes");
274 return (arm_attr_t *)get_irn_generic_attr((ir_node *)node);
278 * Returns the argument register requirements of a arm node.
280 const arm_register_req_t **get_arm_in_req_all(const ir_node *node) {
281 arm_attr_t *attr = get_arm_attr(node);
286 * Returns the result register requirements of an arm node.
288 const arm_register_req_t **get_arm_out_req_all(const ir_node *node) {
289 arm_attr_t *attr = get_arm_attr(node);
290 return attr->out_req;
294 * Returns the argument register requirement at position pos of an arm node.
296 const arm_register_req_t *get_arm_in_req(const ir_node *node, int pos) {
297 arm_attr_t *attr = get_arm_attr(node);
298 return attr->in_req[pos];
302 * Returns the result register requirement at position pos of an arm node.
304 const arm_register_req_t *get_arm_out_req(const ir_node *node, int pos) {
305 arm_attr_t *attr = get_arm_attr(node);
306 return attr->out_req[pos];
310 * Sets the OUT register requirements at position pos.
312 void set_arm_req_out(ir_node *node, const arm_register_req_t *req, int pos) {
313 arm_attr_t *attr = get_arm_attr(node);
314 attr->out_req[pos] = req;
318 * Sets the complete OUT requirements of node.
320 void set_arm_req_out_all(ir_node *node, const arm_register_req_t **reqs) {
321 arm_attr_t *attr = get_arm_attr(node);
322 attr->out_req = reqs;
326 * Sets the IN register requirements at position pos.
328 void set_arm_req_in(ir_node *node, const arm_register_req_t *req, int pos) {
329 arm_attr_t *attr = get_arm_attr(node);
330 attr->in_req[pos] = req;
334 * Returns the register flag of an arm node.
336 arch_irn_flags_t get_arm_flags(const ir_node *node) {
337 arm_attr_t *attr = get_arm_attr(node);
342 * Sets the register flag of an arm node.
344 void set_arm_flags(const ir_node *node, arch_irn_flags_t flags) {
345 arm_attr_t *attr = get_arm_attr(node);
350 * Returns the result register slots of an arm node.
352 const arch_register_t **get_arm_slots(const ir_node *node) {
353 arm_attr_t *attr = get_arm_attr(node);
358 * Returns the name of the OUT register at position pos.
360 const char *get_arm_out_reg_name(const ir_node *node, int pos) {
361 arm_attr_t *attr = get_arm_attr(node);
363 assert(is_arm_irn(node) && "Not an arm node.");
364 assert(pos < attr->n_res && "Invalid OUT position.");
365 assert(attr->slots[pos] && "No register assigned");
367 return arch_register_get_name(attr->slots[pos]);
371 * Returns the index of the OUT register at position pos within its register class.
373 int get_arm_out_regnr(const ir_node *node, int pos) {
374 arm_attr_t *attr = get_arm_attr(node);
376 assert(is_arm_irn(node) && "Not an arm node.");
377 assert(pos < attr->n_res && "Invalid OUT position.");
378 assert(attr->slots[pos] && "No register assigned");
380 return arch_register_get_index(attr->slots[pos]);
384 * Returns the OUT register at position pos.
386 const arch_register_t *get_arm_out_reg(const ir_node *node, int pos) {
387 arm_attr_t *attr = get_arm_attr(node);
389 assert(is_arm_irn(node) && "Not an arm node.");
390 assert(pos < attr->n_res && "Invalid OUT position.");
391 assert(attr->slots[pos] && "No register assigned");
393 return attr->slots[pos];
397 * Sets the number of results.
399 void set_arm_n_res(ir_node *node, int n_res) {
400 arm_attr_t *attr = get_arm_attr(node);
405 * Returns the number of results.
407 int get_arm_n_res(const ir_node *node) {
408 arm_attr_t *attr = get_arm_attr(node);
412 * Returns the tarvalue
414 tarval *get_arm_value(const ir_node *node) {
415 arm_attr_t *attr = get_arm_attr(node);
422 void set_arm_value(ir_node *node, tarval *tv) {
423 arm_attr_t *attr = get_arm_attr(node);
428 * Returns the proj num
430 int get_arm_proj_num(const ir_node *node) {
431 arm_attr_t *attr = get_arm_attr(node);
432 return attr->proj_num;
438 void set_arm_proj_num(ir_node *node, int proj_num) {
439 arm_attr_t *attr = get_arm_attr(node);
440 attr->proj_num = proj_num;
444 * Returns the SymConst label
446 const char *get_arm_symconst_label(ir_node *node) {
447 arm_attr_t *attr = get_arm_attr(node);
448 return attr->symconst_label;
452 * Sets the SymConst label
454 void set_arm_symconst_label(ir_node *node, const char *symconst_label) {
455 arm_attr_t *attr = get_arm_attr(node);
456 attr->symconst_label = symconst_label;
461 * Returns the number of projs.
463 int get_arm_n_projs(ir_node *node) {
464 arm_attr_t *attr = get_arm_attr(node);
465 return attr->n_projs;
469 * Sets the number of projs.
471 void set_arm_n_projs(ir_node *node, int n_projs) {
472 arm_attr_t *attr = get_arm_attr(node);
473 attr->n_projs = n_projs;
477 * Returns the default_proj_num.
479 long get_arm_default_proj_num(ir_node *node) {
480 arm_attr_t *attr = get_arm_attr(node);
481 return attr->default_proj_num;
485 * Sets the default_proj_num.
487 void set_arm_default_proj_num(ir_node *node, long default_proj_num) {
488 arm_attr_t *attr = get_arm_attr(node);
489 attr->default_proj_num = default_proj_num;
493 * Gets the shift modifier attribute.
495 arm_shift_modifier get_arm_shift_modifier(ir_node *node) {
496 arm_attr_t *attr = get_arm_attr(node);
497 return ARM_GET_SHF_MOD(attr);
500 /* Set the ARM machine node attributes to default values. */
501 void init_arm_attributes(ir_node *node, int flags, const arm_register_req_t ** in_reqs,
502 const arm_register_req_t ** out_reqs, int n_res, unsigned latency) {
503 arm_attr_t *attr = get_arm_attr(node);
504 attr->in_req = in_reqs;
505 attr->out_req = out_reqs;
508 attr->instr_fl = (ARM_COND_AL << 3) | ARM_SHF_NONE;
510 attr->proj_num = -42;
511 attr->symconst_label = NULL;
513 attr->default_proj_num = 0;
515 memset((void *)attr->slots, 0, n_res * sizeof(attr->slots[0]));
518 static int arm_comp_condJmp(arm_attr_t *attr_a, arm_attr_t *attr_b) {
523 /***************************************************************************************
526 * _ __ ___ __| | ___ ___ ___ _ __ ___| |_ _ __ _ _ ___| |_ ___ _ __ ___
527 * | '_ \ / _ \ / _` |/ _ \ / __/ _ \| '_ \/ __| __| '__| | | |/ __| __/ _ \| '__/ __|
528 * | | | | (_) | (_| | __/ | (_| (_) | | | \__ \ |_| | | |_| | (__| || (_) | | \__ \
529 * |_| |_|\___/ \__,_|\___| \___\___/|_| |_|___/\__|_| \__,_|\___|\__\___/|_| |___/
531 ***************************************************************************************/
533 /* limit the possible registers for sp in arm_StoreStackM4Inc */
534 static void limit_reg_arm_StoreStackM4Inc_sp(void *_unused, bitset_t *bs) {
535 bs = bitset_clear_all(bs); /* disallow all register (positive constraints given) */
536 bitset_set(bs, 14); /* allow r13 */
537 bitset_clear(bs, 13); /* disallow ignore reg r12 */
538 bitset_clear(bs, 14); /* disallow ignore reg r13 */
539 bitset_clear(bs, 15); /* disallow ignore reg r15 */
540 bitset_clear(bs, 16); /* disallow ignore reg rxx */
543 static const arm_register_req_t _arm_req_sp = {
545 arch_register_req_type_limited,
546 &arm_reg_classes[CLASS_arm_gp],
547 limit_reg_arm_StoreStackM4Inc_sp,
548 NULL, /* limit environment */
549 NULL, /* same node */
550 NULL /* different node */
556 /* construct Store: Store(ptr, val, mem) = ST ptr,val */
557 ir_node *new_r_arm_StoreStackMInc(ir_graph *irg, ir_node *block, ir_node *mem, ir_node *sp,
558 int n_regs, ir_node **regs, ir_mode *mode) {
562 static const arm_register_req_t *_in_req_arm_StoreStackM4Inc[] =
564 &arm_default_req_none,
566 &arm_default_req_arm_gp,
567 &arm_default_req_arm_gp,
568 &arm_default_req_arm_gp,
569 &arm_default_req_arm_gp,
570 &arm_default_req_arm_gp,
571 &arm_default_req_arm_gp,
572 &arm_default_req_arm_gp,
573 &arm_default_req_arm_gp,
574 &arm_default_req_arm_gp,
575 &arm_default_req_arm_gp,
576 &arm_default_req_arm_gp,
577 &arm_default_req_arm_gp,
578 &arm_default_req_arm_gp,
579 &arm_default_req_arm_gp,
582 assert(n_regs <= 15);
586 memcpy(&in[2], regs, n_regs * sizeof(in[0]));
587 res = new_ir_node(NULL, irg, block, op_arm_StoreStackM4Inc, mode, 2 + n_regs, in);
588 flags |= arch_irn_flags_rematerializable; /* op can be easily recalculated */
590 /* init node attributes */
591 init_arm_attributes(res, flags, _in_req_arm_StoreStackM4Inc, NULL, 0, 1);
593 res = optimize_node(res);
594 irn_vrfy_irg(res, irg);
599 /************************************************
601 * / _ \ _ __ | |_(_)_ __ ___ (_)_______ _ __ *
602 * | | | | '_ \| __| | '_ ` _ \| |_ / _ \ '__| *
603 * | |_| | |_) | |_| | | | | | | |/ / __/ | *
604 * \___/| .__/ \__|_|_| |_| |_|_/___\___|_| *
606 ************************************************/
608 typedef struct _opt_tuple {
609 ir_op *op_imm_left; /**< immediate is left */
610 ir_op *op_imm_right; /**< immediate is right */
611 ir_op *op_shf_left; /**< shift operand on left */
612 ir_op *op_shf_right; /**< shift operand on right */
615 static const opt_tuple *opt_ops[iro_arm_last];
617 void arm_set_optimizers(void) {
619 #define STD(op) p_##op = { op_arm_##op##_i, op_arm_##op##_i, op_arm_##op, op_arm_##op }
620 #define LEFT(op) p_##op = { op_arm_##op##_i, NULL, op_arm_##op, NULL }
621 #define SET(op) opt_ops[iro_arm_##op] = &p_##op;
623 static const opt_tuple
632 p_Sub = { op_arm_Sub_i, op_arm_Rsb_i, op_arm_Sub, op_arm_Rsb },
634 memset(opt_ops, 0, sizeof(opt_ops));
648 /* Include the generated constructor functions */
649 #include "gen_arm_new_nodes.c.inl"