2 * This file implements the creation of the architecture specific firm opcodes
3 * and the corresponding node constructors for the arm assembler irg.
21 #include "irgraph_t.h"
27 #include "firm_common_t.h"
31 #include "../bearch.h"
33 #include "arm_nodes_attr.h"
34 #include "arm_new_nodes.h"
35 #include "gen_arm_regalloc_if_t.h"
38 #include "bearch_arm_t.h"
41 * Returns the shift modifier string.
43 const char *arm_shf_mod_name(arm_shift_modifier mod) {
44 static const char *names[] = { NULL, NULL, "asr", "lsl", "lsr", "ror", "rrx" };
48 /***********************************************************************************
51 * __| |_ _ _ __ ___ _ __ ___ _ __ _ _ __ | |_ ___ _ __| |_ __ _ ___ ___
52 * / _` | | | | '_ ` _ \| '_ \ / _ \ '__| | | '_ \| __/ _ \ '__| _/ _` |/ __/ _ \
53 * | (_| | |_| | | | | | | |_) | __/ | | | | | | || __/ | | || (_| | (_| __/
54 * \__,_|\__,_|_| |_| |_| .__/ \___|_| |_|_| |_|\__\___|_| |_| \__,_|\___\___|
57 ***********************************************************************************/
60 * Dumps the register requirements for either in or out.
62 static void dump_reg_req(FILE *F, const ir_node *node,
63 const arch_register_req_t **reqs, int inout) {
64 char *dir = inout ? "out" : "in";
65 int max = inout ? get_arm_n_res(node) : get_irn_arity(node);
69 memset(buf, 0, sizeof(buf));
72 for (i = 0; i < max; i++) {
73 fprintf(F, "%sreq #%d =", dir, i);
75 if (reqs[i]->type == arch_register_req_type_none) {
79 if (reqs[i]->type & arch_register_req_type_normal) {
80 fprintf(F, " %s", reqs[i]->cls->name);
83 if (reqs[i]->type & arch_register_req_type_limited) {
85 arch_register_req_format(buf, sizeof(buf), reqs[i], node));
88 if (reqs[i]->type & arch_register_req_type_should_be_same) {
89 ir_fprintf(F, " same as %+F", get_irn_n(node, reqs[i]->other_same));
92 if (reqs[i]->type & arch_register_req_type_should_be_different) {
93 ir_fprintf(F, " different from %+F", get_irn_n(node, reqs[i]->other_different));
101 fprintf(F, "%sreq = N/A\n", dir);
106 * Dumper interface for dumping arm nodes in vcg.
107 * @param n the node to dump
108 * @param F the output file
109 * @param reason indicates which kind of information should be dumped
110 * @return 0 on success or != 0 on failure
112 static int arm_dump_node(ir_node *n, FILE *F, dump_reason_t reason) {
113 ir_mode *mode = NULL;
116 arm_attr_t *attr = get_arm_attr(n);
117 const arch_register_req_t **reqs;
118 const arch_register_t **slots;
119 arm_shift_modifier mod;
122 case dump_node_opcode_txt:
123 fprintf(F, "%s", get_irn_opname(n));
126 case dump_node_mode_txt:
127 mode = get_irn_mode(n);
130 fprintf(F, "[%s]", get_mode_name(mode));
133 fprintf(F, "[?NOMODE?]");
137 case dump_node_nodeattr_txt:
138 mod = ARM_GET_SHF_MOD(attr);
139 if (ARM_HAS_SHIFT(mod)) {
140 fprintf(F, "[%s #%ld]", arm_shf_mod_name(mod), get_tarval_long(attr->value));
142 else if (mod == ARM_SHF_IMM) {
144 fprintf(F, "[#0x%X]", arm_decode_imm_w_shift(attr->value));
148 case dump_node_info_txt:
149 fprintf(F, "=== arm attr begin ===\n");
151 /* dump IN requirements */
152 if (get_irn_arity(n) > 0) {
153 reqs = get_arm_in_req_all(n);
154 dump_reg_req(F, n, reqs, 0);
157 /* dump OUT requirements */
158 if (attr->n_res > 0) {
159 reqs = get_arm_out_req_all(n);
160 dump_reg_req(F, n, reqs, 1);
163 /* dump assigned registers */
164 slots = get_arm_slots(n);
165 if (slots && attr->n_res > 0) {
166 for (i = 0; i < attr->n_res; i++) {
168 fprintf(F, "reg #%d = %s\n", i, slots[i]->name);
171 fprintf(F, "reg #%d = n/a\n", i);
178 fprintf(F, "n_res = %d\n", get_arm_n_res(n));
181 fprintf(F, "flags =");
182 if (attr->flags == arch_irn_flags_none) {
186 if (attr->flags & arch_irn_flags_dont_spill) {
187 fprintf(F, " unspillable");
189 if (attr->flags & arch_irn_flags_rematerializable) {
190 fprintf(F, " remat");
192 if (attr->flags & arch_irn_flags_ignore) {
193 fprintf(F, " ignore");
196 fprintf(F, " (%d)\n", attr->flags);
198 if (get_arm_value(n)) {
199 if (is_arm_CopyB(n)) {
200 fprintf(F, "size = %lu\n", get_tarval_long(get_arm_value(n)));
202 if (mode_is_float(get_irn_mode(n))) {
203 fprintf(F, "float value = (%f)\n", (double) get_tarval_double(get_arm_value(n)));
204 } else if (mode_is_int(get_irn_mode(n))) {
205 long v = get_tarval_long(get_arm_value(n));
206 fprintf(F, "long value = %ld (0x%08lx)\n", v, v);
207 } else if (mode_is_reference(get_irn_mode(n))) {
208 fprintf(F, "pointer\n");
210 assert(0 && "unbehandelter Typ im const-Knoten");
214 if (get_arm_proj_num(n) >= 0) {
215 fprintf(F, "proj_num = (%d)\n", get_arm_proj_num(n));
217 /* TODO: dump all additional attributes */
219 fprintf(F, "=== arm attr end ===\n");
220 /* end of: case dump_node_info_txt */
228 /***************************************************************************************************
230 * | | | | | | / / | | | | | | | |
231 * __ _| |_| |_ _ __ ___ ___| |_ / /_ _ ___| |_ _ __ ___ ___| |_| |__ ___ __| |___
232 * / _` | __| __| '__| / __|/ _ \ __| / / _` |/ _ \ __| | '_ ` _ \ / _ \ __| '_ \ / _ \ / _` / __|
233 * | (_| | |_| |_| | \__ \ __/ |_ / / (_| | __/ |_ | | | | | | __/ |_| | | | (_) | (_| \__ \
234 * \__,_|\__|\__|_| |___/\___|\__/_/ \__, |\___|\__| |_| |_| |_|\___|\__|_| |_|\___/ \__,_|___/
237 ***************************************************************************************************/
240 * Wraps get_irn_generic_attr() as it takes no const ir_node, so we need to do a cast.
241 * Firm was made by people hating const :-(
243 arm_attr_t *get_arm_attr(const ir_node *node) {
244 assert(is_arm_irn(node) && "need arm node to get attributes");
245 return (arm_attr_t *)get_irn_generic_attr((ir_node *)node);
249 * Returns the argument register requirements of a arm node.
251 const arch_register_req_t **get_arm_in_req_all(const ir_node *node) {
252 arm_attr_t *attr = get_arm_attr(node);
257 * Returns the result register requirements of an arm node.
259 const arch_register_req_t **get_arm_out_req_all(const ir_node *node) {
260 arm_attr_t *attr = get_arm_attr(node);
261 return attr->out_req;
265 * Returns the argument register requirement at position pos of an arm node.
267 const arch_register_req_t *get_arm_in_req(const ir_node *node, int pos) {
268 arm_attr_t *attr = get_arm_attr(node);
269 return attr->in_req[pos];
273 * Returns the result register requirement at position pos of an arm node.
275 const arch_register_req_t *get_arm_out_req(const ir_node *node, int pos) {
276 arm_attr_t *attr = get_arm_attr(node);
277 return attr->out_req[pos];
281 * Sets the OUT register requirements at position pos.
283 void set_arm_req_out(ir_node *node, const arch_register_req_t *req, int pos) {
284 arm_attr_t *attr = get_arm_attr(node);
285 attr->out_req[pos] = req;
289 * Sets the complete OUT requirements of node.
291 void set_arm_req_out_all(ir_node *node, const arch_register_req_t **reqs) {
292 arm_attr_t *attr = get_arm_attr(node);
293 attr->out_req = reqs;
297 * Sets the IN register requirements at position pos.
299 void set_arm_req_in(ir_node *node, const arch_register_req_t *req, int pos) {
300 arm_attr_t *attr = get_arm_attr(node);
301 attr->in_req[pos] = req;
305 * Returns the register flag of an arm node.
307 arch_irn_flags_t get_arm_flags(const ir_node *node) {
308 arm_attr_t *attr = get_arm_attr(node);
313 * Sets the register flag of an arm node.
315 void set_arm_flags(const ir_node *node, arch_irn_flags_t flags) {
316 arm_attr_t *attr = get_arm_attr(node);
321 * Returns the result register slots of an arm node.
323 const arch_register_t **get_arm_slots(const ir_node *node) {
324 arm_attr_t *attr = get_arm_attr(node);
329 * Returns the name of the OUT register at position pos.
331 const char *get_arm_out_reg_name(const ir_node *node, int pos) {
332 arm_attr_t *attr = get_arm_attr(node);
334 assert(is_arm_irn(node) && "Not an arm node.");
335 assert(pos < attr->n_res && "Invalid OUT position.");
336 assert(attr->slots[pos] && "No register assigned");
338 return arch_register_get_name(attr->slots[pos]);
342 * Returns the index of the OUT register at position pos within its register class.
344 int get_arm_out_regnr(const ir_node *node, int pos) {
345 arm_attr_t *attr = get_arm_attr(node);
347 assert(is_arm_irn(node) && "Not an arm node.");
348 assert(pos < attr->n_res && "Invalid OUT position.");
349 assert(attr->slots[pos] && "No register assigned");
351 return arch_register_get_index(attr->slots[pos]);
355 * Returns the OUT register at position pos.
357 const arch_register_t *get_arm_out_reg(const ir_node *node, int pos) {
358 arm_attr_t *attr = get_arm_attr(node);
360 assert(is_arm_irn(node) && "Not an arm node.");
361 assert(pos < attr->n_res && "Invalid OUT position.");
362 assert(attr->slots[pos] && "No register assigned");
364 return attr->slots[pos];
368 * Sets the number of results.
370 void set_arm_n_res(ir_node *node, int n_res) {
371 arm_attr_t *attr = get_arm_attr(node);
376 * Returns the number of results.
378 int get_arm_n_res(const ir_node *node) {
379 arm_attr_t *attr = get_arm_attr(node);
383 * Returns the tarvalue
385 tarval *get_arm_value(const ir_node *node) {
386 arm_attr_t *attr = get_arm_attr(node);
393 void set_arm_value(ir_node *node, tarval *tv) {
394 arm_attr_t *attr = get_arm_attr(node);
399 * Returns the proj num
401 int get_arm_proj_num(const ir_node *node) {
402 arm_attr_t *attr = get_arm_attr(node);
403 return attr->proj_num;
409 void set_arm_proj_num(ir_node *node, int proj_num) {
410 arm_attr_t *attr = get_arm_attr(node);
411 attr->proj_num = proj_num;
415 * Returns the SymConst label
417 const char *get_arm_symconst_label(ir_node *node) {
418 arm_attr_t *attr = get_arm_attr(node);
419 return attr->symconst_label;
423 * Sets the SymConst label
425 void set_arm_symconst_label(ir_node *node, const char *symconst_label) {
426 arm_attr_t *attr = get_arm_attr(node);
427 attr->symconst_label = symconst_label;
432 * Returns the number of projs.
434 int get_arm_n_projs(ir_node *node) {
435 arm_attr_t *attr = get_arm_attr(node);
436 return attr->n_projs;
440 * Sets the number of projs.
442 void set_arm_n_projs(ir_node *node, int n_projs) {
443 arm_attr_t *attr = get_arm_attr(node);
444 attr->n_projs = n_projs;
448 * Returns the default_proj_num.
450 long get_arm_default_proj_num(ir_node *node) {
451 arm_attr_t *attr = get_arm_attr(node);
452 return attr->default_proj_num;
456 * Sets the default_proj_num.
458 void set_arm_default_proj_num(ir_node *node, long default_proj_num) {
459 arm_attr_t *attr = get_arm_attr(node);
460 attr->default_proj_num = default_proj_num;
464 * Gets the shift modifier attribute.
466 arm_shift_modifier get_arm_shift_modifier(ir_node *node) {
467 arm_attr_t *attr = get_arm_attr(node);
468 return ARM_GET_SHF_MOD(attr);
471 /* Set the ARM machine node attributes to default values. */
472 void init_arm_attributes(ir_node *node, int flags, const arch_register_req_t ** in_reqs,
473 const arch_register_req_t ** out_reqs, const be_execution_unit_t ***execution_units,
474 int n_res, unsigned latency) {
475 arm_attr_t *attr = get_arm_attr(node);
476 attr->in_req = in_reqs;
477 attr->out_req = out_reqs;
480 attr->instr_fl = (ARM_COND_AL << 3) | ARM_SHF_NONE;
482 attr->proj_num = -42;
483 attr->symconst_label = NULL;
485 attr->default_proj_num = 0;
487 memset((void *)attr->slots, 0, n_res * sizeof(attr->slots[0]));
490 static int arm_comp_condJmp(arm_attr_t *attr_a, arm_attr_t *attr_b) {
495 /***************************************************************************************
498 * _ __ ___ __| | ___ ___ ___ _ __ ___| |_ _ __ _ _ ___| |_ ___ _ __ ___
499 * | '_ \ / _ \ / _` |/ _ \ / __/ _ \| '_ \/ __| __| '__| | | |/ __| __/ _ \| '__/ __|
500 * | | | | (_) | (_| | __/ | (_| (_) | | | \__ \ |_| | | |_| | (__| || (_) | | \__ \
501 * |_| |_|\___/ \__,_|\___| \___\___/|_| |_|___/\__|_| \__,_|\___|\__\___/|_| |___/
503 ***************************************************************************************/
508 #define BIT(x) (1 << (x % 32))
510 static unsigned arm_req_sp_limited[] = { BIT(REG_SP) };
511 static const arch_register_req_t _arm_req_sp = {
512 arch_register_req_type_limited,
513 &arm_reg_classes[CLASS_arm_gp],
519 /* construct Store: Store(ptr, val, mem) = ST ptr,val */
520 ir_node *new_r_arm_StoreStackMInc(ir_graph *irg, ir_node *block, ir_node *mem,
521 ir_node *sp, int n_regs, ir_node **regs,
526 static const arch_register_req_t *_in_req_arm_StoreStackM4Inc[] =
528 &arm_StoreStackM4Inc_reg_req_in_0,
529 &arm_StoreStackM4Inc_reg_req_in_1,
530 &arm_StoreStackM4Inc_reg_req_in_2,
531 &arm_StoreStackM4Inc_reg_req_in_2,
532 &arm_StoreStackM4Inc_reg_req_in_2,
533 &arm_StoreStackM4Inc_reg_req_in_2,
534 &arm_StoreStackM4Inc_reg_req_in_2,
535 &arm_StoreStackM4Inc_reg_req_in_2,
536 &arm_StoreStackM4Inc_reg_req_in_2,
537 &arm_StoreStackM4Inc_reg_req_in_2,
538 &arm_StoreStackM4Inc_reg_req_in_2,
539 &arm_StoreStackM4Inc_reg_req_in_2,
540 &arm_StoreStackM4Inc_reg_req_in_2,
541 &arm_StoreStackM4Inc_reg_req_in_2,
542 &arm_StoreStackM4Inc_reg_req_in_2,
543 &arm_StoreStackM4Inc_reg_req_in_2,
544 &arm_StoreStackM4Inc_reg_req_in_2,
547 assert(n_regs <= 15);
551 memcpy(&in[2], regs, n_regs * sizeof(in[0]));
552 res = new_ir_node(NULL, irg, block, op_arm_StoreStackM4Inc, mode, 2 + n_regs, in);
553 flags |= arch_irn_flags_rematerializable; /* op can be easily recalculated */
555 /* init node attributes */
556 init_arm_attributes(res, flags, _in_req_arm_StoreStackM4Inc, NULL, NULL, 0, 1);
558 res = optimize_node(res);
559 irn_vrfy_irg(res, irg);
564 /************************************************
566 * / _ \ _ __ | |_(_)_ __ ___ (_)_______ _ __ *
567 * | | | | '_ \| __| | '_ ` _ \| |_ / _ \ '__| *
568 * | |_| | |_) | |_| | | | | | | |/ / __/ | *
569 * \___/| .__/ \__|_|_| |_| |_|_/___\___|_| *
571 ************************************************/
573 typedef struct _opt_tuple {
574 ir_op *op_imm_left; /**< immediate is left */
575 ir_op *op_imm_right; /**< immediate is right */
576 ir_op *op_shf_left; /**< shift operand on left */
577 ir_op *op_shf_right; /**< shift operand on right */
580 //static const opt_tuple *opt_ops[iro_arm_last];
582 void arm_set_optimizers(void) {
584 #define STD(op) p_##op = { op_arm_##op##_i, op_arm_##op##_i, op_arm_##op, op_arm_##op }
585 #define LEFT(op) p_##op = { op_arm_##op##_i, NULL, op_arm_##op, NULL }
586 #define SET(op) opt_ops[iro_arm_##op] = &p_##op;
588 static const opt_tuple
597 p_Sub = { op_arm_Sub_i, op_arm_Rsb_i, op_arm_Sub, op_arm_Rsb },
599 memset(opt_ops, 0, sizeof(opt_ops));
613 /* Include the generated constructor functions */
614 #include "gen_arm_new_nodes.c.inl"