2 * Copyright (C) 1995-2008 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief This file implements the creation of the architecture specific firm
23 * opcodes and the corresponding node constructors for the arm
25 * @author Oliver Richter, Tobias Gneist
35 #include "irgraph_t.h"
41 #include "firm_common_t.h"
46 #include "../bearch_t.h"
48 #include "arm_nodes_attr.h"
49 #include "arm_new_nodes.h"
52 #include "bearch_arm_t.h"
55 * Returns the shift modifier string.
57 const char *arm_shf_mod_name(arm_shift_modifier mod) {
58 static const char *names[] = { NULL, NULL, "asr", "lsl", "lsr", "ror", "rrx" };
63 * Return the fpa immediate from the encoding.
65 const char *arm_get_fpa_imm_name(long imm_value) {
66 static const char *fpa_imm[] = {
76 return fpa_imm[imm_value];
79 /***********************************************************************************
82 * __| |_ _ _ __ ___ _ __ ___ _ __ _ _ __ | |_ ___ _ __| |_ __ _ ___ ___
83 * / _` | | | | '_ ` _ \| '_ \ / _ \ '__| | | '_ \| __/ _ \ '__| _/ _` |/ __/ _ \
84 * | (_| | |_| | | | | | | |_) | __/ | | | | | | || __/ | | || (_| | (_| __/
85 * \__,_|\__,_|_| |_| |_| .__/ \___|_| |_|_| |_|\__\___|_| |_| \__,_|\___\___|
88 ***********************************************************************************/
91 * Dumps the register requirements for either in or out.
93 static void dump_reg_req(FILE *F, const ir_node *node,
94 const arch_register_req_t **reqs, int inout) {
95 char *dir = inout ? "out" : "in";
96 int max = inout ? get_arm_n_res(node) : get_irn_arity(node);
100 memset(buf, 0, sizeof(buf));
103 for (i = 0; i < max; i++) {
104 fprintf(F, "%sreq #%d =", dir, i);
106 if (reqs[i]->type == arch_register_req_type_none) {
110 if (reqs[i]->type & arch_register_req_type_normal) {
111 fprintf(F, " %s", reqs[i]->cls->name);
114 if (reqs[i]->type & arch_register_req_type_limited) {
116 arch_register_req_format(buf, sizeof(buf), reqs[i], node));
119 if (reqs[i]->type & arch_register_req_type_should_be_same) {
120 const unsigned other = reqs[i]->other_same;
123 ir_fprintf(F, " same as");
124 for (i = 0; 1U << i <= other; ++i) {
125 if (other & (1U << i)) {
126 ir_fprintf(F, " %+F", get_irn_n(node, i));
131 if (reqs[i]->type & arch_register_req_type_should_be_different) {
132 const unsigned other = reqs[i]->other_different;
135 ir_fprintf(F, " different from");
136 for (i = 0; 1U << i <= other; ++i) {
137 if (other & (1U << i)) {
138 ir_fprintf(F, " %+F", get_irn_n(node, i));
148 fprintf(F, "%sreq = N/A\n", dir);
153 * Dumper interface for dumping arm nodes in vcg.
154 * @param n the node to dump
155 * @param F the output file
156 * @param reason indicates which kind of information should be dumped
157 * @return 0 on success or != 0 on failure
159 static int arm_dump_node(ir_node *n, FILE *F, dump_reason_t reason) {
160 ir_mode *mode = NULL;
163 arm_attr_t *attr = get_arm_attr(n);
164 const arch_register_req_t **reqs;
165 const arch_register_t **slots;
166 arm_shift_modifier mod;
169 case dump_node_opcode_txt:
170 fprintf(F, "%s", get_irn_opname(n));
173 case dump_node_mode_txt:
174 mode = get_irn_mode(n);
177 fprintf(F, "[%s]", get_mode_name(mode));
180 fprintf(F, "[?NOMODE?]");
184 case dump_node_nodeattr_txt:
185 mod = ARM_GET_SHF_MOD(attr);
186 if (ARM_HAS_SHIFT(mod)) {
187 fprintf(F, "[%s #%ld]", arm_shf_mod_name(mod), attr->imm_value);
189 else if (mod == ARM_SHF_IMM) {
191 fprintf(F, "[#0x%X]", arm_decode_imm_w_shift(attr->imm_value));
195 case dump_node_info_txt:
196 fprintf(F, "=== arm attr begin ===\n");
198 /* dump IN requirements */
199 if (get_irn_arity(n) > 0) {
200 reqs = get_arm_in_req_all(n);
201 dump_reg_req(F, n, reqs, 0);
204 /* dump OUT requirements */
205 if (ARR_LEN(attr->slots) > 0) {
206 reqs = get_arm_out_req_all(n);
207 dump_reg_req(F, n, reqs, 1);
210 /* dump assigned registers */
211 slots = get_arm_slots(n);
212 if (slots && ARR_LEN(attr->slots) > 0) {
213 for (i = 0; i < ARR_LEN(attr->slots); i++) {
215 fprintf(F, "reg #%d = %s\n", i, slots[i]->name);
218 fprintf(F, "reg #%d = n/a\n", i);
225 fprintf(F, "n_res = %d\n", get_arm_n_res(n));
228 fprintf(F, "flags =");
229 if (attr->flags == arch_irn_flags_none) {
233 if (attr->flags & arch_irn_flags_dont_spill) {
234 fprintf(F, " unspillable");
236 if (attr->flags & arch_irn_flags_rematerializable) {
237 fprintf(F, " remat");
239 if (attr->flags & arch_irn_flags_ignore) {
240 fprintf(F, " ignore");
243 fprintf(F, " (%d)\n", attr->flags);
245 if (is_arm_CopyB(n)) {
246 fprintf(F, "size = %lu\n", get_arm_imm_value(n));
248 long v = get_arm_imm_value(n);
249 if (ARM_GET_FPA_IMM(attr)) {
250 fprintf(F, "immediate float value = %s\n", arm_get_fpa_imm_name(v));
252 fprintf(F, "immediate value = %ld (0x%08lx)\n", v, v);
256 if (is_arm_CmpBra(n) && get_arm_CondJmp_proj_num(n) >= 0) {
257 fprintf(F, "proj_num = (%d)\n", get_arm_CondJmp_proj_num(n));
259 /* TODO: dump all additional attributes */
261 fprintf(F, "=== arm attr end ===\n");
262 /* end of: case dump_node_info_txt */
270 /***************************************************************************************************
272 * | | | | | | / / | | | | | | | |
273 * __ _| |_| |_ _ __ ___ ___| |_ / /_ _ ___| |_ _ __ ___ ___| |_| |__ ___ __| |___
274 * / _` | __| __| '__| / __|/ _ \ __| / / _` |/ _ \ __| | '_ ` _ \ / _ \ __| '_ \ / _ \ / _` / __|
275 * | (_| | |_| |_| | \__ \ __/ |_ / / (_| | __/ |_ | | | | | | __/ |_| | | | (_) | (_| \__ \
276 * \__,_|\__|\__|_| |___/\___|\__/_/ \__, |\___|\__| |_| |_| |_|\___|\__|_| |_|\___/ \__,_|___/
279 ***************************************************************************************************/
281 /* Returns the attributes of a generic Arm node. */
282 arm_attr_t *get_arm_attr(ir_node *node) {
283 assert(is_arm_irn(node) && "need arm node to get attributes");
284 return get_irn_generic_attr(node);
287 const arm_attr_t *get_arm_attr_const(const ir_node *node) {
288 assert(is_arm_irn(node) && "need arm node to get attributes");
289 return get_irn_generic_attr_const(node);
293 * Returns the attributes of an ARM SymConst node.
295 arm_SymConst_attr_t *get_arm_SymConst_attr(ir_node *node) {
296 assert(is_arm_SymConst(node));
297 return get_irn_generic_attr(node);
300 const arm_SymConst_attr_t *get_arm_SymConst_attr_const(const ir_node *node) {
301 assert(is_arm_SymConst(node));
302 return get_irn_generic_attr_const(node);
305 static const arm_fpaConst_attr_t *get_arm_fpaConst_attr_const(const ir_node *node) {
306 const arm_attr_t *attr = get_arm_attr_const(node);
307 const arm_fpaConst_attr_t *fpa_attr = CONST_CAST_ARM_ATTR(arm_fpaConst_attr_t, attr);
312 static arm_fpaConst_attr_t *get_arm_fpaConst_attr(ir_node *node) {
313 arm_attr_t *attr = get_arm_attr(node);
314 arm_fpaConst_attr_t *fpa_attr = CAST_ARM_ATTR(arm_fpaConst_attr_t, attr);
319 static int is_arm_CondJmp(const ir_node *node) {
320 int code = get_arm_irn_opcode(node);
322 return (code == iro_arm_CmpBra || code == iro_arm_fpaCmfBra ||
323 code == iro_arm_fpaCnfBra || iro_arm_fpaCmfeBra ||
324 code == iro_arm_fpaCnfeBra);
327 /* Returns the attributes of a CondJmp node. */
328 arm_CondJmp_attr_t *get_arm_CondJmp_attr(ir_node *node) {
329 assert(is_arm_CondJmp(node));
330 return get_irn_generic_attr(node);
333 const arm_CondJmp_attr_t *get_arm_CondJmp_attr_const(const ir_node *node) {
334 assert(is_arm_CondJmp(node));
335 return get_irn_generic_attr_const(node);
338 /* Returns the attributes of a SwitchJmp node. */
339 arm_SwitchJmp_attr_t *get_arm_SwitchJmp_attr(ir_node *node) {
340 assert(is_arm_SwitchJmp(node));
341 return get_irn_generic_attr(node);
344 const arm_SwitchJmp_attr_t *get_arm_SwitchJmp_attr_const(const ir_node *node) {
345 assert(is_arm_SwitchJmp(node));
346 return get_irn_generic_attr_const(node);
350 * Returns the argument register requirements of a arm node.
352 const arch_register_req_t **get_arm_in_req_all(const ir_node *node) {
353 const arm_attr_t *attr = get_arm_attr_const(node);
358 * Returns the result register requirements of an arm node.
360 const arch_register_req_t **get_arm_out_req_all(const ir_node *node) {
361 const arm_attr_t *attr = get_arm_attr_const(node);
362 return attr->out_req;
366 * Returns the argument register requirement at position pos of an arm node.
368 const arch_register_req_t *get_arm_in_req(const ir_node *node, int pos) {
369 const arm_attr_t *attr = get_arm_attr_const(node);
370 return attr->in_req[pos];
374 * Returns the result register requirement at position pos of an arm node.
376 const arch_register_req_t *get_arm_out_req(const ir_node *node, int pos) {
377 const arm_attr_t *attr = get_arm_attr_const(node);
378 return attr->out_req[pos];
382 * Sets the OUT register requirements at position pos.
384 void set_arm_req_out(ir_node *node, const arch_register_req_t *req, int pos) {
385 arm_attr_t *attr = get_arm_attr(node);
386 attr->out_req[pos] = req;
390 * Sets the complete OUT requirements of node.
392 void set_arm_req_out_all(ir_node *node, const arch_register_req_t **reqs) {
393 arm_attr_t *attr = get_arm_attr(node);
394 attr->out_req = reqs;
398 * Sets the IN register requirements at position pos.
400 void set_arm_req_in(ir_node *node, const arch_register_req_t *req, int pos) {
401 arm_attr_t *attr = get_arm_attr(node);
402 attr->in_req[pos] = req;
406 * Returns the register flag of an arm node.
408 arch_irn_flags_t get_arm_flags(const ir_node *node) {
409 const arm_attr_t *attr = get_arm_attr_const(node);
414 * Sets the register flag of an arm node.
416 void set_arm_flags(ir_node *node, arch_irn_flags_t flags) {
417 arm_attr_t *attr = get_arm_attr(node);
422 * Returns the result register slots of an arm node.
424 const arch_register_t **get_arm_slots(const ir_node *node) {
425 const arm_attr_t *attr = get_arm_attr_const(node);
430 * Returns the name of the OUT register at position pos.
432 const char *get_arm_out_reg_name(const ir_node *node, int pos) {
433 const arm_attr_t *attr = get_arm_attr_const(node);
435 assert(is_arm_irn(node) && "Not an arm node.");
436 assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position.");
437 assert(attr->slots[pos] && "No register assigned");
439 return arch_register_get_name(attr->slots[pos]);
443 * Returns the index of the OUT register at position pos within its register class.
445 int get_arm_out_regnr(const ir_node *node, int pos) {
446 const arm_attr_t *attr = get_arm_attr_const(node);
448 assert(is_arm_irn(node) && "Not an arm node.");
449 assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position.");
450 assert(attr->slots[pos] && "No register assigned");
452 return arch_register_get_index(attr->slots[pos]);
456 * Returns the OUT register at position pos.
458 const arch_register_t *get_arm_out_reg(const ir_node *node, int pos) {
459 const arm_attr_t *attr = get_arm_attr_const(node);
461 assert(is_arm_irn(node) && "Not an arm node.");
462 assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position.");
463 assert(attr->slots[pos] && "No register assigned");
465 return attr->slots[pos];
469 * Sets the flags for the n'th out.
471 void set_arm_out_flags(ir_node *node, arch_irn_flags_t flags, int pos) {
472 arm_attr_t *attr = get_arm_attr(node);
473 assert(pos < ARR_LEN(attr->out_flags) && "Invalid OUT position.");
474 attr->out_flags[pos] = flags;
478 * Gets the flags for the n'th out.
480 arch_irn_flags_t get_arm_out_flags(const ir_node *node, int pos) {
481 const arm_attr_t *attr = get_arm_attr_const(node);
482 assert(pos < ARR_LEN(attr->out_flags) && "Invalid OUT position.");
483 return attr->out_flags[pos];
487 * Returns the number of results.
489 int get_arm_n_res(const ir_node *node) {
490 const arm_attr_t *attr = get_arm_attr_const(node);
491 return ARR_LEN(attr->slots);
495 * Returns the immediate value
497 long get_arm_imm_value(const ir_node *node) {
498 const arm_attr_t *attr = get_arm_attr_const(node);
499 return attr->imm_value;
503 * Sets the tarval value
505 void set_arm_imm_value(ir_node *node, long imm_value) {
506 arm_attr_t *attr = get_arm_attr(node);
507 attr->imm_value = imm_value;
511 * Returns the fpaConst value
513 tarval *get_fpaConst_value(const ir_node *node) {
514 const arm_fpaConst_attr_t *attr = get_arm_fpaConst_attr_const(node);
519 * Sets the tarval value
521 void set_fpaConst_value(ir_node *node, tarval *tv) {
522 arm_fpaConst_attr_t *attr = get_arm_fpaConst_attr(node);
527 * Returns the proj num
529 int get_arm_CondJmp_proj_num(const ir_node *node) {
530 const arm_CondJmp_attr_t *attr = get_arm_CondJmp_attr_const(node);
531 return attr->proj_num;
537 void set_arm_CondJmp_proj_num(ir_node *node, int proj_num) {
538 arm_CondJmp_attr_t *attr = get_arm_CondJmp_attr(node);
539 attr->proj_num = proj_num;
543 * Returns the SymConst label
545 ident *get_arm_symconst_id(const ir_node *node) {
546 const arm_SymConst_attr_t *attr = get_arm_SymConst_attr_const(node);
547 return attr->symconst_id;
551 * Sets the SymConst label
553 void set_arm_symconst_id(ir_node *node, ident *symconst_id) {
554 arm_SymConst_attr_t *attr = get_arm_SymConst_attr(node);
555 attr->symconst_id = symconst_id;
559 * Returns the number of projs of a SwitchJmp.
561 int get_arm_SwitchJmp_n_projs(const ir_node *node) {
562 const arm_SwitchJmp_attr_t *attr = get_arm_SwitchJmp_attr_const(node);
563 return attr->n_projs;
567 * Sets the number of projs.
569 void set_arm_SwitchJmp_n_projs(ir_node *node, int n_projs) {
570 arm_SwitchJmp_attr_t *attr = get_arm_SwitchJmp_attr(node);
571 attr->n_projs = n_projs;
575 * Returns the default_proj_num.
577 long get_arm_SwitchJmp_default_proj_num(const ir_node *node) {
578 const arm_SwitchJmp_attr_t *attr = get_arm_SwitchJmp_attr_const(node);
579 return attr->default_proj_num;
583 * Sets the default_proj_num.
585 void set_arm_SwitchJmp_default_proj_num(ir_node *node, long default_proj_num) {
586 arm_SwitchJmp_attr_t *attr = get_arm_SwitchJmp_attr(node);
587 attr->default_proj_num = default_proj_num;
591 * Gets the shift modifier attribute.
593 arm_shift_modifier get_arm_shift_modifier(const ir_node *node) {
594 const arm_attr_t *attr = get_arm_attr_const(node);
595 return ARM_GET_SHF_MOD(attr);
598 /* Set the ARM machine node attributes to default values. */
599 static void init_arm_attributes(ir_node *node, int flags,
600 const arch_register_req_t ** in_reqs,
601 const arch_register_req_t ** out_reqs,
602 const be_execution_unit_t ***execution_units,
604 ir_graph *irg = get_irn_irg(node);
605 struct obstack *obst = get_irg_obstack(irg);
606 arm_attr_t *attr = get_arm_attr(node);
607 (void) execution_units;
609 attr->in_req = in_reqs;
610 attr->out_req = out_reqs;
612 attr->instr_fl = (ARM_COND_AL << 3) | ARM_SHF_NONE;
615 attr->out_flags = NEW_ARR_D(int, obst, n_res);
616 memset(attr->out_flags, 0, n_res * sizeof(attr->out_flags[0]));
618 attr->slots = NEW_ARR_D(const arch_register_t*, obst, n_res);
619 memset(attr->slots, 0, n_res * sizeof(attr->slots[0]));
622 /************************************************
624 * / _ \ _ __ | |_(_)_ __ ___ (_)_______ _ __ *
625 * | | | | '_ \| __| | '_ ` _ \| |_ / _ \ '__| *
626 * | |_| | |_) | |_| | | | | | | |/ / __/ | *
627 * \___/| .__/ \__|_|_| |_| |_|_/___\___|_| *
629 ************************************************/
631 typedef struct _opt_tuple {
632 ir_op *op_imm_left; /**< immediate is left */
633 ir_op *op_imm_right; /**< immediate is right */
634 ir_op *op_shf_left; /**< shift operand on left */
635 ir_op *op_shf_right; /**< shift operand on right */
638 //static const opt_tuple *opt_ops[iro_arm_last];
640 void arm_set_optimizers(void) {
642 #define STD(op) p_##op = { op_arm_##op##_i, op_arm_##op##_i, op_arm_##op, op_arm_##op }
643 #define LEFT(op) p_##op = { op_arm_##op##_i, NULL, op_arm_##op, NULL }
644 #define SET(op) opt_ops[iro_arm_##op] = &p_##op;
646 static const opt_tuple
655 p_Sub = { op_arm_Sub_i, op_arm_Rsb_i, op_arm_Sub, op_arm_Rsb },
657 memset(opt_ops, 0, sizeof(opt_ops));
670 static int cmp_attr_arm(ir_node *a, ir_node *b) {
671 arm_attr_t *attr_a = get_irn_generic_attr(a);
672 arm_attr_t *attr_b = get_irn_generic_attr(b);
673 return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->imm_value != attr_b->imm_value);
676 static int cmp_attr_arm_SymConst(ir_node *a, ir_node *b) {
677 const arm_SymConst_attr_t *attr_a;
678 const arm_SymConst_attr_t *attr_b;
680 if (cmp_attr_arm(a, b))
683 attr_a = get_irn_generic_attr_const(a);
684 attr_b = get_irn_generic_attr_const(b);
685 return attr_a->symconst_id != attr_b->symconst_id;
688 static int cmp_attr_arm_CondJmp(ir_node *a, ir_node *b) {
691 /* never identical */
695 static int cmp_attr_arm_SwitchJmp(ir_node *a, ir_node *b) {
698 /* never identical */
702 static int cmp_attr_arm_fpaConst(ir_node *a, ir_node *b) {
703 const arm_fpaConst_attr_t *attr_a;
704 const arm_fpaConst_attr_t *attr_b;
706 if (cmp_attr_arm(a, b))
709 attr_a = get_arm_fpaConst_attr_const(a);
710 attr_b = get_arm_fpaConst_attr_const(b);
712 return attr_a->tv != attr_b->tv;
715 /** copies the ARM attributes of a node. */
716 static void arm_copy_attr(const ir_node *old_node, ir_node *new_node) {
717 ir_graph *irg = get_irn_irg(new_node);
718 struct obstack *obst = get_irg_obstack(irg);
719 const arm_attr_t *attr_old = get_arm_attr_const(old_node);
720 arm_attr_t *attr_new = get_arm_attr(new_node);
722 /* copy the attributes */
723 memcpy(attr_new, attr_old, get_op_attr_size(get_irn_op(old_node)));
726 attr_new->out_flags =
727 DUP_ARR_D(int, obst, attr_old->out_flags);
728 /* copy register assignments */
730 DUP_ARR_D(arch_register_t*, obst, attr_old->slots);
735 /* Include the generated constructor functions */
736 #include "gen_arm_new_nodes.c.inl"