2 * Copyright (C) 1995-2007 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief This file implements the creation of the architecture specific firm
23 * opcodes and the corresponding node constructors for the arm
25 * @author Oliver Richter, Tobias Gneist
35 #include "irgraph_t.h"
41 #include "firm_common_t.h"
46 #include "../bearch_t.h"
48 #include "arm_nodes_attr.h"
49 #include "arm_new_nodes.h"
52 #include "bearch_arm_t.h"
55 * Returns the shift modifier string.
57 const char *arm_shf_mod_name(arm_shift_modifier mod) {
58 static const char *names[] = { NULL, NULL, "asr", "lsl", "lsr", "ror", "rrx" };
62 /***********************************************************************************
65 * __| |_ _ _ __ ___ _ __ ___ _ __ _ _ __ | |_ ___ _ __| |_ __ _ ___ ___
66 * / _` | | | | '_ ` _ \| '_ \ / _ \ '__| | | '_ \| __/ _ \ '__| _/ _` |/ __/ _ \
67 * | (_| | |_| | | | | | | |_) | __/ | | | | | | || __/ | | || (_| | (_| __/
68 * \__,_|\__,_|_| |_| |_| .__/ \___|_| |_|_| |_|\__\___|_| |_| \__,_|\___\___|
71 ***********************************************************************************/
74 * Dumps the register requirements for either in or out.
76 static void dump_reg_req(FILE *F, const ir_node *node,
77 const arch_register_req_t **reqs, int inout) {
78 char *dir = inout ? "out" : "in";
79 int max = inout ? get_arm_n_res(node) : get_irn_arity(node);
83 memset(buf, 0, sizeof(buf));
86 for (i = 0; i < max; i++) {
87 fprintf(F, "%sreq #%d =", dir, i);
89 if (reqs[i]->type == arch_register_req_type_none) {
93 if (reqs[i]->type & arch_register_req_type_normal) {
94 fprintf(F, " %s", reqs[i]->cls->name);
97 if (reqs[i]->type & arch_register_req_type_limited) {
99 arch_register_req_format(buf, sizeof(buf), reqs[i], node));
102 if (reqs[i]->type & arch_register_req_type_should_be_same) {
103 ir_fprintf(F, " same as %+F", get_irn_n(node, reqs[i]->other_same[0]));
104 if (reqs[i]->other_same[1] != -1)
105 ir_fprintf(F, " or %+F", get_irn_n(node, reqs[i]->other_same[1]));
108 if (reqs[i]->type & arch_register_req_type_should_be_different) {
109 ir_fprintf(F, " different from %+F", get_irn_n(node, reqs[i]->other_different));
117 fprintf(F, "%sreq = N/A\n", dir);
122 * Dumper interface for dumping arm nodes in vcg.
123 * @param n the node to dump
124 * @param F the output file
125 * @param reason indicates which kind of information should be dumped
126 * @return 0 on success or != 0 on failure
128 static int arm_dump_node(ir_node *n, FILE *F, dump_reason_t reason) {
129 ir_mode *mode = NULL;
132 arm_attr_t *attr = get_arm_attr(n);
133 const arch_register_req_t **reqs;
134 const arch_register_t **slots;
135 arm_shift_modifier mod;
138 case dump_node_opcode_txt:
139 fprintf(F, "%s", get_irn_opname(n));
142 case dump_node_mode_txt:
143 mode = get_irn_mode(n);
146 fprintf(F, "[%s]", get_mode_name(mode));
149 fprintf(F, "[?NOMODE?]");
153 case dump_node_nodeattr_txt:
154 mod = ARM_GET_SHF_MOD(attr);
155 if (ARM_HAS_SHIFT(mod)) {
156 fprintf(F, "[%s #%ld]", arm_shf_mod_name(mod), get_tarval_long(attr->value));
158 else if (mod == ARM_SHF_IMM) {
160 fprintf(F, "[#0x%X]", arm_decode_imm_w_shift(attr->value));
164 case dump_node_info_txt:
165 fprintf(F, "=== arm attr begin ===\n");
167 /* dump IN requirements */
168 if (get_irn_arity(n) > 0) {
169 reqs = get_arm_in_req_all(n);
170 dump_reg_req(F, n, reqs, 0);
173 /* dump OUT requirements */
174 if (ARR_LEN(attr->slots) > 0) {
175 reqs = get_arm_out_req_all(n);
176 dump_reg_req(F, n, reqs, 1);
179 /* dump assigned registers */
180 slots = get_arm_slots(n);
181 if (slots && ARR_LEN(attr->slots) > 0) {
182 for (i = 0; i < ARR_LEN(attr->slots); i++) {
184 fprintf(F, "reg #%d = %s\n", i, slots[i]->name);
187 fprintf(F, "reg #%d = n/a\n", i);
194 fprintf(F, "n_res = %d\n", get_arm_n_res(n));
197 fprintf(F, "flags =");
198 if (attr->flags == arch_irn_flags_none) {
202 if (attr->flags & arch_irn_flags_dont_spill) {
203 fprintf(F, " unspillable");
205 if (attr->flags & arch_irn_flags_rematerializable) {
206 fprintf(F, " remat");
208 if (attr->flags & arch_irn_flags_ignore) {
209 fprintf(F, " ignore");
212 fprintf(F, " (%d)\n", attr->flags);
214 if (get_arm_value(n)) {
215 if (is_arm_CopyB(n)) {
216 fprintf(F, "size = %lu\n", get_tarval_long(get_arm_value(n)));
218 if (mode_is_float(get_irn_mode(n))) {
219 fprintf(F, "float value = (%f)\n", (double) get_tarval_double(get_arm_value(n)));
220 } else if (mode_is_int(get_irn_mode(n))) {
221 long v = get_tarval_long(get_arm_value(n));
222 fprintf(F, "long value = %ld (0x%08lx)\n", v, v);
223 } else if (mode_is_reference(get_irn_mode(n))) {
224 fprintf(F, "pointer\n");
226 assert(0 && "unbehandelter Typ im const-Knoten");
230 if (is_arm_CmpBra(n) && get_arm_CondJmp_proj_num(n) >= 0) {
231 fprintf(F, "proj_num = (%d)\n", get_arm_CondJmp_proj_num(n));
233 /* TODO: dump all additional attributes */
235 fprintf(F, "=== arm attr end ===\n");
236 /* end of: case dump_node_info_txt */
244 /***************************************************************************************************
246 * | | | | | | / / | | | | | | | |
247 * __ _| |_| |_ _ __ ___ ___| |_ / /_ _ ___| |_ _ __ ___ ___| |_| |__ ___ __| |___
248 * / _` | __| __| '__| / __|/ _ \ __| / / _` |/ _ \ __| | '_ ` _ \ / _ \ __| '_ \ / _ \ / _` / __|
249 * | (_| | |_| |_| | \__ \ __/ |_ / / (_| | __/ |_ | | | | | | __/ |_| | | | (_) | (_| \__ \
250 * \__,_|\__|\__|_| |___/\___|\__/_/ \__, |\___|\__| |_| |_| |_|\___|\__|_| |_|\___/ \__,_|___/
253 ***************************************************************************************************/
255 /* Returns the attributes of a generic Arm node. */
256 arm_attr_t *get_arm_attr(ir_node *node) {
257 assert(is_arm_irn(node) && "need arm node to get attributes");
258 return get_irn_generic_attr(node);
261 const arm_attr_t *get_arm_attr_const(const ir_node *node) {
262 assert(is_arm_irn(node) && "need arm node to get attributes");
263 return get_irn_generic_attr_const(node);
267 * Returns the attributes of an ARM SymConst node.
269 arm_SymConst_attr_t *get_arm_SymConst_attr(ir_node *node) {
270 assert(is_arm_SymConst(node));
271 return get_irn_generic_attr(node);
274 const arm_SymConst_attr_t *get_arm_SymConst_attr_const(const ir_node *node) {
275 assert(is_arm_SymConst(node));
276 return get_irn_generic_attr_const(node);
279 /* Returns the attributes of a CondJmp node. */
280 arm_CondJmp_attr_t *get_arm_CmpBra_attr(ir_node *node) {
281 assert(is_arm_CmpBra(node));
282 return get_irn_generic_attr(node);
285 const arm_CondJmp_attr_t *get_arm_CmpBra_attr_const(const ir_node *node) {
286 assert(is_arm_CmpBra(node));
287 return get_irn_generic_attr_const(node);
290 /* Returns the attributes of a SwitchJmp node. */
291 arm_SwitchJmp_attr_t *get_arm_SwitchJmp_attr(ir_node *node) {
292 assert(is_arm_SwitchJmp(node));
293 return get_irn_generic_attr(node);
296 const arm_SwitchJmp_attr_t *get_arm_SwitchJmp_attr_const(const ir_node *node) {
297 assert(is_arm_SwitchJmp(node));
298 return get_irn_generic_attr_const(node);
302 * Returns the argument register requirements of a arm node.
304 const arch_register_req_t **get_arm_in_req_all(const ir_node *node) {
305 const arm_attr_t *attr = get_arm_attr_const(node);
310 * Returns the result register requirements of an arm node.
312 const arch_register_req_t **get_arm_out_req_all(const ir_node *node) {
313 const arm_attr_t *attr = get_arm_attr_const(node);
314 return attr->out_req;
318 * Returns the argument register requirement at position pos of an arm node.
320 const arch_register_req_t *get_arm_in_req(const ir_node *node, int pos) {
321 const arm_attr_t *attr = get_arm_attr_const(node);
322 return attr->in_req[pos];
326 * Returns the result register requirement at position pos of an arm node.
328 const arch_register_req_t *get_arm_out_req(const ir_node *node, int pos) {
329 const arm_attr_t *attr = get_arm_attr_const(node);
330 return attr->out_req[pos];
334 * Sets the OUT register requirements at position pos.
336 void set_arm_req_out(ir_node *node, const arch_register_req_t *req, int pos) {
337 arm_attr_t *attr = get_arm_attr(node);
338 attr->out_req[pos] = req;
342 * Sets the complete OUT requirements of node.
344 void set_arm_req_out_all(ir_node *node, const arch_register_req_t **reqs) {
345 arm_attr_t *attr = get_arm_attr(node);
346 attr->out_req = reqs;
350 * Sets the IN register requirements at position pos.
352 void set_arm_req_in(ir_node *node, const arch_register_req_t *req, int pos) {
353 arm_attr_t *attr = get_arm_attr(node);
354 attr->in_req[pos] = req;
358 * Returns the register flag of an arm node.
360 arch_irn_flags_t get_arm_flags(const ir_node *node) {
361 const arm_attr_t *attr = get_arm_attr_const(node);
366 * Sets the register flag of an arm node.
368 void set_arm_flags(ir_node *node, arch_irn_flags_t flags) {
369 arm_attr_t *attr = get_arm_attr(node);
374 * Returns the result register slots of an arm node.
376 const arch_register_t **get_arm_slots(const ir_node *node) {
377 const arm_attr_t *attr = get_arm_attr_const(node);
382 * Returns the name of the OUT register at position pos.
384 const char *get_arm_out_reg_name(const ir_node *node, int pos) {
385 const arm_attr_t *attr = get_arm_attr_const(node);
387 assert(is_arm_irn(node) && "Not an arm node.");
388 assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position.");
389 assert(attr->slots[pos] && "No register assigned");
391 return arch_register_get_name(attr->slots[pos]);
395 * Returns the index of the OUT register at position pos within its register class.
397 int get_arm_out_regnr(const ir_node *node, int pos) {
398 const arm_attr_t *attr = get_arm_attr_const(node);
400 assert(is_arm_irn(node) && "Not an arm node.");
401 assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position.");
402 assert(attr->slots[pos] && "No register assigned");
404 return arch_register_get_index(attr->slots[pos]);
408 * Returns the OUT register at position pos.
410 const arch_register_t *get_arm_out_reg(const ir_node *node, int pos) {
411 const arm_attr_t *attr = get_arm_attr_const(node);
413 assert(is_arm_irn(node) && "Not an arm node.");
414 assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position.");
415 assert(attr->slots[pos] && "No register assigned");
417 return attr->slots[pos];
421 * Sets the flags for the n'th out.
423 void set_arm_out_flags(ir_node *node, arch_irn_flags_t flags, int pos) {
424 arm_attr_t *attr = get_arm_attr(node);
425 assert(pos < ARR_LEN(attr->out_flags) && "Invalid OUT position.");
426 attr->out_flags[pos] = flags;
430 * Gets the flags for the n'th out.
432 arch_irn_flags_t get_arm_out_flags(const ir_node *node, int pos) {
433 const arm_attr_t *attr = get_arm_attr_const(node);
434 assert(pos < ARR_LEN(attr->out_flags) && "Invalid OUT position.");
435 return attr->out_flags[pos];
439 * Returns the number of results.
441 int get_arm_n_res(const ir_node *node) {
442 const arm_attr_t *attr = get_arm_attr_const(node);
443 return ARR_LEN(attr->slots);
446 * Returns the tarvalue
448 tarval *get_arm_value(const ir_node *node) {
449 const arm_attr_t *attr = get_arm_attr_const(node);
456 void set_arm_value(ir_node *node, tarval *tv) {
457 arm_attr_t *attr = get_arm_attr(node);
462 * Returns the proj num
464 int get_arm_CondJmp_proj_num(const ir_node *node) {
465 const arm_CondJmp_attr_t *attr = get_arm_CmpBra_attr_const(node);
466 return attr->proj_num;
472 void set_arm_CondJmp_proj_num(ir_node *node, int proj_num) {
473 arm_CondJmp_attr_t *attr = get_arm_CmpBra_attr(node);
474 attr->proj_num = proj_num;
478 * Returns the SymConst label
480 ident *get_arm_symconst_id(const ir_node *node) {
481 const arm_SymConst_attr_t *attr = get_arm_SymConst_attr_const(node);
482 return attr->symconst_id;
486 * Sets the SymConst label
488 void set_arm_symconst_id(ir_node *node, ident *symconst_id) {
489 arm_SymConst_attr_t *attr = get_arm_SymConst_attr(node);
490 attr->symconst_id = symconst_id;
494 * Returns the number of projs of a SwitchJmp.
496 int get_arm_SwitchJmp_n_projs(const ir_node *node) {
497 const arm_SwitchJmp_attr_t *attr = get_arm_SwitchJmp_attr_const(node);
498 return attr->n_projs;
502 * Sets the number of projs.
504 void set_arm_SwitchJmp_n_projs(ir_node *node, int n_projs) {
505 arm_SwitchJmp_attr_t *attr = get_arm_SwitchJmp_attr(node);
506 attr->n_projs = n_projs;
510 * Returns the default_proj_num.
512 long get_arm_SwitchJmp_default_proj_num(const ir_node *node) {
513 const arm_SwitchJmp_attr_t *attr = get_arm_SwitchJmp_attr_const(node);
514 return attr->default_proj_num;
518 * Sets the default_proj_num.
520 void set_arm_SwitchJmp_default_proj_num(ir_node *node, long default_proj_num) {
521 arm_SwitchJmp_attr_t *attr = get_arm_SwitchJmp_attr(node);
522 attr->default_proj_num = default_proj_num;
526 * Gets the shift modifier attribute.
528 arm_shift_modifier get_arm_shift_modifier(const ir_node *node) {
529 const arm_attr_t *attr = get_arm_attr_const(node);
530 return ARM_GET_SHF_MOD(attr);
533 /* Set the ARM machine node attributes to default values. */
534 static void init_arm_attributes(ir_node *node, int flags,
535 const arch_register_req_t ** in_reqs,
536 const arch_register_req_t ** out_reqs,
537 const be_execution_unit_t ***execution_units,
538 int n_res, unsigned latency) {
539 ir_graph *irg = get_irn_irg(node);
540 struct obstack *obst = get_irg_obstack(irg);
541 arm_attr_t *attr = get_arm_attr(node);
542 (void) execution_units;
545 attr->in_req = in_reqs;
546 attr->out_req = out_reqs;
548 attr->instr_fl = (ARM_COND_AL << 3) | ARM_SHF_NONE;
551 attr->out_flags = NEW_ARR_D(int, obst, n_res);
552 memset(attr->out_flags, 0, n_res * sizeof(attr->out_flags[0]));
554 attr->slots = NEW_ARR_D(const arch_register_t*, obst, n_res);
555 memset(attr->slots, 0, n_res * sizeof(attr->slots[0]));
558 /************************************************
560 * / _ \ _ __ | |_(_)_ __ ___ (_)_______ _ __ *
561 * | | | | '_ \| __| | '_ ` _ \| |_ / _ \ '__| *
562 * | |_| | |_) | |_| | | | | | | |/ / __/ | *
563 * \___/| .__/ \__|_|_| |_| |_|_/___\___|_| *
565 ************************************************/
567 typedef struct _opt_tuple {
568 ir_op *op_imm_left; /**< immediate is left */
569 ir_op *op_imm_right; /**< immediate is right */
570 ir_op *op_shf_left; /**< shift operand on left */
571 ir_op *op_shf_right; /**< shift operand on right */
574 //static const opt_tuple *opt_ops[iro_arm_last];
576 void arm_set_optimizers(void) {
578 #define STD(op) p_##op = { op_arm_##op##_i, op_arm_##op##_i, op_arm_##op, op_arm_##op }
579 #define LEFT(op) p_##op = { op_arm_##op##_i, NULL, op_arm_##op, NULL }
580 #define SET(op) opt_ops[iro_arm_##op] = &p_##op;
582 static const opt_tuple
591 p_Sub = { op_arm_Sub_i, op_arm_Rsb_i, op_arm_Sub, op_arm_Rsb },
593 memset(opt_ops, 0, sizeof(opt_ops));
606 static int cmp_attr_arm_SymConst(ir_node *a, ir_node *b) {
607 const arm_SymConst_attr_t *attr_a = get_irn_generic_attr_const(a);
608 const arm_SymConst_attr_t *attr_b = get_irn_generic_attr_const(b);
609 return attr_a->symconst_id != attr_b->symconst_id;
612 static int cmp_attr_arm(ir_node *a, ir_node *b) {
613 arm_attr_t *attr_a = get_irn_generic_attr(a);
614 arm_attr_t *attr_b = get_irn_generic_attr(b);
615 return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->value != attr_b->value);
618 static int cmp_attr_arm_CondJmp(ir_node *a, ir_node *b) {
621 /* never identical */
625 static int cmp_attr_arm_SwitchJmp(ir_node *a, ir_node *b) {
628 /* never identical */
632 /** copies the ARM attributes of a node. */
633 static void arm_copy_attr(const ir_node *old_node, ir_node *new_node) {
634 ir_graph *irg = get_irn_irg(new_node);
635 struct obstack *obst = get_irg_obstack(irg);
636 const arm_attr_t *attr_old = get_arm_attr_const(old_node);
637 arm_attr_t *attr_new = get_arm_attr(new_node);
639 /* copy the attributes */
640 memcpy(attr_new, attr_old, get_op_attr_size(get_irn_op(old_node)));
643 attr_new->out_flags =
644 DUP_ARR_D(int, obst, attr_old->out_flags);
645 /* copy register assignments */
647 DUP_ARR_D(arch_register_t*, obst, attr_old->slots);
652 /* Include the generated constructor functions */
653 #include "gen_arm_new_nodes.c.inl"