2 * Copyright (C) 1995-2008 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 * @author Oliver Richter, Tobias Gneist, Michael Beck
41 #include "raw_bitset.h"
45 #include "beblocksched.h"
48 #include "be_dbgout.h"
50 #include "arm_emitter.h"
51 #include "arm_optimize.h"
52 #include "gen_arm_emitter.h"
53 #include "arm_nodes_attr.h"
54 #include "arm_new_nodes.h"
55 #include "arm_map_regs.h"
56 #include "gen_arm_regalloc_if.h"
60 #define SNPRINTF_BUF_LEN 128
62 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
64 static set *sym_or_tv;
65 static arm_isa_t *isa;
67 static void arm_emit_register(const arch_register_t *reg)
69 be_emit_string(arch_register_get_name(reg));
72 void arm_emit_source_register(const ir_node *node, int pos)
74 const arch_register_t *reg = arch_get_irn_register_in(node, pos);
75 arm_emit_register(reg);
78 void arm_emit_dest_register(const ir_node *node, int pos)
80 const arch_register_t *reg = arch_get_irn_register_out(node, pos);
81 arm_emit_register(reg);
84 void arm_emit_offset(const ir_node *node)
86 const arm_load_store_attr_t *attr = get_arm_load_store_attr_const(node);
87 assert(attr->base.is_load_store);
89 be_emit_irprintf("0x%X", attr->offset);
93 * Emit the arm fpa instruction suffix depending on the mode.
95 static void arm_emit_fpa_postfix(const ir_mode *mode)
97 int bits = get_mode_size_bits(mode);
107 void arm_emit_float_load_store_mode(const ir_node *node)
109 const arm_load_store_attr_t *attr = get_arm_load_store_attr_const(node);
110 arm_emit_fpa_postfix(attr->load_store_mode);
113 void arm_emit_float_arithmetic_mode(const ir_node *node)
115 const arm_farith_attr_t *attr = get_arm_farith_attr_const(node);
116 arm_emit_fpa_postfix(attr->mode);
119 void arm_emit_symconst(const ir_node *node)
121 const arm_SymConst_attr_t *symconst = get_arm_SymConst_attr_const(node);
122 ir_entity *entity = symconst->entity;
124 be_gas_emit_entity(entity);
126 /* TODO do something with offset */
129 void arm_emit_load_mode(const ir_node *node)
131 const arm_load_store_attr_t *attr = get_arm_load_store_attr_const(node);
132 ir_mode *mode = attr->load_store_mode;
133 int bits = get_mode_size_bits(mode);
134 bool is_signed = mode_is_signed(mode);
136 be_emit_string(is_signed ? "sh" : "h");
137 } else if (bits == 8) {
138 be_emit_string(is_signed ? "sb" : "b");
144 void arm_emit_store_mode(const ir_node *node)
146 const arm_load_store_attr_t *attr = get_arm_load_store_attr_const(node);
147 ir_mode *mode = attr->load_store_mode;
148 int bits = get_mode_size_bits(mode);
150 be_emit_cstring("h");
151 } else if (bits == 8) {
152 be_emit_cstring("b");
158 static void emit_shf_mod_name(arm_shift_modifier_t mod)
161 case ARM_SHF_ASR_REG:
162 case ARM_SHF_ASR_IMM:
163 be_emit_cstring("asr");
165 case ARM_SHF_LSL_REG:
166 case ARM_SHF_LSL_IMM:
167 be_emit_cstring("lsl");
169 case ARM_SHF_LSR_REG:
170 case ARM_SHF_LSR_IMM:
171 be_emit_cstring("lsr");
173 case ARM_SHF_ROR_REG:
174 case ARM_SHF_ROR_IMM:
175 be_emit_cstring("ror");
180 panic("can't emit this shf_mod_name %d", (int) mod);
183 void arm_emit_shifter_operand(const ir_node *node)
185 const arm_shifter_operand_t *attr = get_arm_shifter_operand_attr_const(node);
187 switch (attr->shift_modifier) {
189 arm_emit_source_register(node, get_irn_arity(node) - 1);
192 unsigned val = attr->immediate_value;
193 val = (val >> attr->shift_immediate)
194 | (val << (32-attr->shift_immediate));
196 be_emit_irprintf("#0x%X", val);
199 case ARM_SHF_ASR_IMM:
200 case ARM_SHF_LSL_IMM:
201 case ARM_SHF_LSR_IMM:
202 case ARM_SHF_ROR_IMM:
203 arm_emit_source_register(node, get_irn_arity(node) - 1);
204 be_emit_cstring(", ");
205 emit_shf_mod_name(attr->shift_modifier);
206 be_emit_irprintf(" #0x%X", attr->shift_immediate);
209 case ARM_SHF_ASR_REG:
210 case ARM_SHF_LSL_REG:
211 case ARM_SHF_LSR_REG:
212 case ARM_SHF_ROR_REG:
213 arm_emit_source_register(node, get_irn_arity(node) - 2);
214 be_emit_cstring(", ");
215 emit_shf_mod_name(attr->shift_modifier);
216 be_emit_cstring(" ");
217 arm_emit_source_register(node, get_irn_arity(node) - 1);
221 arm_emit_source_register(node, get_irn_arity(node) - 1);
222 panic("RRX shifter emitter TODO");
224 case ARM_SHF_INVALID:
227 panic("Invalid shift_modifier while emitting %+F", node);
230 /** An entry in the sym_or_tv set. */
231 typedef struct sym_or_tv_t {
233 ir_entity *entity; /**< An entity. */
234 ir_tarval *tv; /**< A tarval. */
235 const void *generic; /**< For generic compare. */
237 unsigned label; /**< the associated label. */
238 bool is_entity; /**< true if an entity is stored. */
242 * Returns a unique label. This number will not be used a second time.
244 static unsigned get_unique_label(void)
246 static unsigned id = 0;
250 static void emit_constant_name(const sym_or_tv_t *entry)
252 be_emit_irprintf("%sC%u", be_gas_get_private_prefix(), entry->label);
258 static void emit_arm_SymConst(const ir_node *irn)
260 const arm_SymConst_attr_t *attr = get_arm_SymConst_attr_const(irn);
261 sym_or_tv_t key, *entry;
263 key.u.entity = attr->entity;
264 key.is_entity = true;
266 entry = (sym_or_tv_t *)set_insert(sym_or_tv, &key, sizeof(key), hash_ptr(key.u.generic));
267 if (entry->label == 0) {
268 /* allocate a label */
269 entry->label = get_unique_label();
272 /* load the symbol indirect */
273 be_emit_cstring("\tldr ");
274 arm_emit_dest_register(irn, 0);
275 be_emit_cstring(", ");
276 emit_constant_name(entry);
277 be_emit_finish_line_gas(irn);
280 static void emit_arm_FrameAddr(const ir_node *irn)
282 const arm_SymConst_attr_t *attr = get_arm_SymConst_attr_const(irn);
284 be_emit_cstring("\tadd ");
285 arm_emit_dest_register(irn, 0);
286 be_emit_cstring(", ");
287 arm_emit_source_register(irn, 0);
288 be_emit_cstring(", ");
289 be_emit_irprintf("#0x%X", attr->fp_offset);
290 be_emit_finish_line_gas(irn);
294 * Emit a floating point fpa constant.
296 static void emit_arm_fConst(const ir_node *irn)
298 sym_or_tv_t key, *entry;
301 key.u.tv = get_fConst_value(irn);
302 key.is_entity = false;
304 entry = (sym_or_tv_t *)set_insert(sym_or_tv, &key, sizeof(key), hash_ptr(key.u.generic));
305 if (entry->label == 0) {
306 /* allocate a label */
307 entry->label = get_unique_label();
310 /* load the tarval indirect */
311 mode = get_irn_mode(irn);
312 be_emit_cstring("\tldf");
313 arm_emit_fpa_postfix(mode);
316 arm_emit_dest_register(irn, 0);
317 be_emit_cstring(", ");
318 emit_constant_name(entry);
319 be_emit_finish_line_gas(irn);
323 * Returns the next block in a block schedule.
325 static ir_node *sched_next_block(const ir_node *block)
327 return (ir_node*)get_irn_link(block);
331 * Returns the target block for a control flow node.
333 static ir_node *get_cfop_target_block(const ir_node *irn)
335 return (ir_node*)get_irn_link(irn);
339 * Emit the target label for a control flow node.
341 static void arm_emit_cfop_target(const ir_node *irn)
343 ir_node *block = get_cfop_target_block(irn);
345 be_gas_emit_block_name(block);
349 * Emit a Compare with conditional branch.
351 static void emit_arm_B(const ir_node *irn)
353 const ir_edge_t *edge;
354 const ir_node *proj_true = NULL;
355 const ir_node *proj_false = NULL;
356 const ir_node *block;
357 const ir_node *next_block;
358 ir_node *op1 = get_irn_n(irn, 0);
360 ir_relation relation = get_arm_CondJmp_relation(irn);
361 const arm_cmp_attr_t *cmp_attr = get_arm_cmp_attr_const(op1);
362 bool is_signed = !cmp_attr->is_unsigned;
364 assert(is_arm_Cmp(op1) || is_arm_Tst(op1));
366 foreach_out_edge(irn, edge) {
367 ir_node *proj = get_edge_src_irn(edge);
368 long nr = get_Proj_proj(proj);
369 if (nr == pn_Cond_true) {
376 if (cmp_attr->ins_permuted) {
377 relation = get_inversed_relation(relation);
380 /* for now, the code works for scheduled and non-schedules blocks */
381 block = get_nodes_block(irn);
383 /* we have a block schedule */
384 next_block = sched_next_block(block);
386 assert(relation != ir_relation_false);
387 assert(relation != ir_relation_true);
389 if (get_cfop_target_block(proj_true) == next_block) {
390 /* exchange both proj's so the second one can be omitted */
391 const ir_node *t = proj_true;
393 proj_true = proj_false;
395 relation = get_negated_relation(relation);
398 switch (relation & (ir_relation_less_equal_greater)) {
399 case ir_relation_equal: suffix = "eq"; break;
400 case ir_relation_less: suffix = is_signed ? "lt" : "lo"; break;
401 case ir_relation_less_equal: suffix = is_signed ? "le" : "ls"; break;
402 case ir_relation_greater: suffix = is_signed ? "gt" : "hi"; break;
403 case ir_relation_greater_equal: suffix = is_signed ? "ge" : "hs"; break;
404 case ir_relation_less_greater: suffix = "ne"; break;
405 case ir_relation_less_equal_greater: suffix = "al"; break;
406 default: panic("Cmp has unsupported relation");
409 /* emit the true proj */
410 be_emit_irprintf("\tb%s ", suffix);
411 arm_emit_cfop_target(proj_true);
412 be_emit_finish_line_gas(proj_true);
414 if (get_cfop_target_block(proj_false) == next_block) {
415 be_emit_cstring("\t/* fallthrough to ");
416 arm_emit_cfop_target(proj_false);
417 be_emit_cstring(" */");
418 be_emit_finish_line_gas(proj_false);
420 be_emit_cstring("\tb ");
421 arm_emit_cfop_target(proj_false);
422 be_emit_finish_line_gas(proj_false);
426 /** Sort register in ascending order. */
427 static int reg_cmp(const void *a, const void *b)
429 const arch_register_t * const *ra = (const arch_register_t**)a;
430 const arch_register_t * const *rb = (const arch_register_t**)b;
432 return *ra < *rb ? -1 : (*ra != *rb);
436 * Create the CopyB instruction sequence.
438 static void emit_arm_CopyB(const ir_node *irn)
440 const arm_CopyB_attr_t *attr = get_arm_CopyB_attr_const(irn);
441 unsigned size = attr->size;
443 const char *tgt = arch_register_get_name(arch_get_irn_register_in(irn, 0));
444 const char *src = arch_register_get_name(arch_get_irn_register_in(irn, 1));
445 const char *t0, *t1, *t2, *t3;
447 const arch_register_t *tmpregs[4];
449 /* collect the temporary registers and sort them, we need ascending order */
450 tmpregs[0] = arch_get_irn_register_in(irn, 2);
451 tmpregs[1] = arch_get_irn_register_in(irn, 3);
452 tmpregs[2] = arch_get_irn_register_in(irn, 4);
453 tmpregs[3] = &arm_registers[REG_R12];
455 /* Note: R12 is always the last register because the RA did not assign higher ones */
456 qsort((void *)tmpregs, 3, sizeof(tmpregs[0]), reg_cmp);
458 /* need ascending order */
459 t0 = arch_register_get_name(tmpregs[0]);
460 t1 = arch_register_get_name(tmpregs[1]);
461 t2 = arch_register_get_name(tmpregs[2]);
462 t3 = arch_register_get_name(tmpregs[3]);
464 be_emit_cstring("/* MemCopy (");
466 be_emit_cstring(")->(");
467 arm_emit_source_register(irn, 0);
468 be_emit_irprintf(" [%u bytes], Uses ", size);
470 be_emit_cstring(", ");
472 be_emit_cstring(", ");
474 be_emit_cstring(", and ");
476 be_emit_cstring("*/");
477 be_emit_finish_line_gas(NULL);
479 assert(size > 0 && "CopyB needs size > 0" );
482 fprintf(stderr, "strange hack enabled: copy more bytes than needed!");
491 be_emit_cstring("\tldr ");
493 be_emit_cstring(", [");
495 be_emit_cstring(", #0]");
496 be_emit_finish_line_gas(NULL);
498 be_emit_cstring("\tstr ");
500 be_emit_cstring(", [");
502 be_emit_cstring(", #0]");
503 be_emit_finish_line_gas(irn);
506 be_emit_cstring("\tldmia ");
508 be_emit_cstring("!, {");
510 be_emit_cstring(", ");
513 be_emit_finish_line_gas(NULL);
515 be_emit_cstring("\tstmia ");
517 be_emit_cstring("!, {");
519 be_emit_cstring(", ");
522 be_emit_finish_line_gas(irn);
525 be_emit_cstring("\tldmia ");
527 be_emit_cstring("!, {");
529 be_emit_cstring(", ");
531 be_emit_cstring(", ");
534 be_emit_finish_line_gas(NULL);
536 be_emit_cstring("\tstmia ");
538 be_emit_cstring("!, {");
540 be_emit_cstring(", ");
542 be_emit_cstring(", ");
545 be_emit_finish_line_gas(irn);
550 be_emit_cstring("\tldmia ");
552 be_emit_cstring("!, {");
554 be_emit_cstring(", ");
556 be_emit_cstring(", ");
558 be_emit_cstring(", ");
561 be_emit_finish_line_gas(NULL);
563 be_emit_cstring("\tstmia ");
565 be_emit_cstring("!, {");
567 be_emit_cstring(", ");
569 be_emit_cstring(", ");
571 be_emit_cstring(", ");
574 be_emit_finish_line_gas(irn);
579 static void emit_arm_SwitchJmp(const ir_node *irn)
581 const arm_SwitchJmp_attr_t *attr = get_arm_SwitchJmp_attr_const(irn);
582 be_emit_cstring("\tldrls pc, [pc, ");
583 arm_emit_source_register(irn, 0);
584 be_emit_cstring(", asl #2]");
585 be_emit_finish_line_gas(irn);
587 be_emit_jump_table(irn, attr->table, NULL, get_cfop_target_block);
590 /** Emit an IncSP node */
591 static void emit_be_IncSP(const ir_node *irn)
593 int offs = -be_get_IncSP_offset(irn);
597 be_emit_cstring("\tsub ");
600 be_emit_cstring("\tadd ");
602 arm_emit_dest_register(irn, 0);
603 be_emit_cstring(", ");
604 arm_emit_source_register(irn, 0);
605 be_emit_irprintf(", #0x%X", offs);
606 be_emit_finish_line_gas(irn);
608 /* omitted IncSP(0) */
613 static void emit_be_Copy(const ir_node *irn)
615 ir_mode *mode = get_irn_mode(irn);
617 if (arch_get_irn_register_in(irn, 0) == arch_get_irn_register_out(irn, 0)) {
622 if (mode_is_float(mode)) {
624 be_emit_cstring("\tmvf");
626 arm_emit_dest_register(irn, 0);
627 be_emit_cstring(", ");
628 arm_emit_source_register(irn, 0);
629 be_emit_finish_line_gas(irn);
631 panic("emit_be_Copy: move not supported for this mode");
633 } else if (mode_is_data(mode)) {
634 be_emit_cstring("\tmov ");
635 arm_emit_dest_register(irn, 0);
636 be_emit_cstring(", ");
637 arm_emit_source_register(irn, 0);
638 be_emit_finish_line_gas(irn);
640 panic("emit_be_Copy: move not supported for this mode");
644 static void emit_be_Perm(const ir_node *irn)
646 be_emit_cstring("\teor ");
647 arm_emit_source_register(irn, 0);
648 be_emit_cstring(", ");
649 arm_emit_source_register(irn, 0);
650 be_emit_cstring(", ");
651 arm_emit_source_register(irn, 1);
652 be_emit_finish_line_gas(NULL);
654 be_emit_cstring("\teor ");
655 arm_emit_source_register(irn, 1);
656 be_emit_cstring(", ");
657 arm_emit_source_register(irn, 0);
658 be_emit_cstring(", ");
659 arm_emit_source_register(irn, 1);
660 be_emit_finish_line_gas(NULL);
662 be_emit_cstring("\teor ");
663 arm_emit_source_register(irn, 0);
664 be_emit_cstring(", ");
665 arm_emit_source_register(irn, 0);
666 be_emit_cstring(", ");
667 arm_emit_source_register(irn, 1);
668 be_emit_finish_line_gas(irn);
671 static void emit_be_MemPerm(const ir_node *node)
677 /* TODO: this implementation is slower than necessary.
678 The longterm goal is however to avoid the memperm node completely */
680 memperm_arity = be_get_MemPerm_entity_arity(node);
681 if (memperm_arity > 12)
682 panic("memperm with more than 12 inputs not supported yet");
684 for (i = 0; i < memperm_arity; ++i) {
686 ir_entity *entity = be_get_MemPerm_in_entity(node, i);
689 be_emit_irprintf("\tstr r%d, [sp, #-4]!", i);
690 be_emit_finish_line_gas(node);
692 /* load from entity */
693 offset = get_entity_offset(entity) + sp_change;
694 be_emit_irprintf("\tldr r%d, [sp, #%d]", i, offset);
695 be_emit_finish_line_gas(node);
698 for (i = memperm_arity-1; i >= 0; --i) {
700 ir_entity *entity = be_get_MemPerm_out_entity(node, i);
702 /* store to new entity */
703 offset = get_entity_offset(entity) + sp_change;
704 be_emit_irprintf("\tstr r%d, [sp, #%d]", i, offset);
705 be_emit_finish_line_gas(node);
706 /* restore register */
707 be_emit_irprintf("\tldr r%d, [sp], #4", i);
709 be_emit_finish_line_gas(node);
711 assert(sp_change == 0);
714 static void emit_be_Start(const ir_node *node)
716 ir_graph *irg = get_irn_irg(node);
717 ir_type *frame_type = get_irg_frame_type(irg);
718 unsigned size = get_type_size_bytes(frame_type);
720 /* allocate stackframe */
722 be_emit_cstring("\tsub ");
723 arm_emit_register(&arm_registers[REG_SP]);
724 be_emit_cstring(", ");
725 arm_emit_register(&arm_registers[REG_SP]);
726 be_emit_irprintf(", #0x%X", size);
727 be_emit_finish_line_gas(node);
731 static void emit_be_Return(const ir_node *node)
733 ir_graph *irg = get_irn_irg(node);
734 ir_type *frame_type = get_irg_frame_type(irg);
735 unsigned size = get_type_size_bytes(frame_type);
737 /* deallocate stackframe */
739 be_emit_cstring("\tadd ");
740 arm_emit_register(&arm_registers[REG_SP]);
741 be_emit_cstring(", ");
742 arm_emit_register(&arm_registers[REG_SP]);
743 be_emit_irprintf(", #0x%X", size);
744 be_emit_finish_line_gas(node);
747 be_emit_cstring("\tmov pc, lr");
748 be_emit_finish_line_gas(node);
752 static void emit_arm_Jmp(const ir_node *node)
754 ir_node *block, *next_block;
756 /* for now, the code works for scheduled and non-schedules blocks */
757 block = get_nodes_block(node);
759 /* we have a block schedule */
760 next_block = sched_next_block(block);
761 if (get_cfop_target_block(node) != next_block) {
762 be_emit_cstring("\tb ");
763 arm_emit_cfop_target(node);
765 be_emit_cstring("\t/* fallthrough to ");
766 arm_emit_cfop_target(node);
767 be_emit_cstring(" */");
769 be_emit_finish_line_gas(node);
772 static void emit_nothing(const ir_node *irn)
778 * The type of a emitter function.
780 typedef void (emit_func)(const ir_node *irn);
783 * Set a node emitter. Make it a bit more type safe.
785 static inline void set_emitter(ir_op *op, emit_func arm_emit_node)
787 op->ops.generic = (op_func)arm_emit_node;
791 * Enters the emitter functions for handled nodes into the generic
792 * pointer of an opcode.
794 static void arm_register_emitters(void)
796 /* first clear the generic function pointer for all ops */
797 ir_clear_opcodes_generic_func();
799 /* register all emitter functions defined in spec */
800 arm_register_spec_emitters();
803 set_emitter(op_arm_B, emit_arm_B);
804 set_emitter(op_arm_CopyB, emit_arm_CopyB);
805 set_emitter(op_arm_fConst, emit_arm_fConst);
806 set_emitter(op_arm_FrameAddr, emit_arm_FrameAddr);
807 set_emitter(op_arm_Jmp, emit_arm_Jmp);
808 set_emitter(op_arm_SwitchJmp, emit_arm_SwitchJmp);
809 set_emitter(op_arm_SymConst, emit_arm_SymConst);
810 set_emitter(op_be_Copy, emit_be_Copy);
811 set_emitter(op_be_CopyKeep, emit_be_Copy);
812 set_emitter(op_be_IncSP, emit_be_IncSP);
813 set_emitter(op_be_MemPerm, emit_be_MemPerm);
814 set_emitter(op_be_Perm, emit_be_Perm);
815 set_emitter(op_be_Return, emit_be_Return);
816 set_emitter(op_be_Start, emit_be_Start);
818 /* no need to emit anything for the following nodes */
819 set_emitter(op_Phi, emit_nothing);
820 set_emitter(op_be_Keep, emit_nothing);
824 * Emits code for a node.
826 static void arm_emit_node(const ir_node *irn)
828 ir_op *op = get_irn_op(irn);
830 if (op->ops.generic) {
831 emit_func *emit = (emit_func *)op->ops.generic;
832 be_dbg_set_dbg_info(get_irn_dbg_info(irn));
835 panic("Error: No emit handler for node %+F (graph %+F)\n",
836 irn, get_irn_irg(irn));
841 * emit the block label if needed.
843 static void arm_emit_block_header(ir_node *block, ir_node *prev)
848 ir_graph *irg = get_irn_irg(block);
849 ir_exec_freq *exec_freq = be_get_irg_exec_freq(irg);
852 n_cfgpreds = get_Block_n_cfgpreds(block);
853 if (n_cfgpreds == 1) {
854 ir_node *pred = get_Block_cfgpred(block, 0);
855 ir_node *pred_block = get_nodes_block(pred);
857 /* we don't need labels for fallthrough blocks, however switch-jmps
858 * are no fallthroughs */
859 if (pred_block == prev &&
860 !(is_Proj(pred) && is_arm_SwitchJmp(get_Proj_pred(pred)))) {
870 be_gas_emit_block_name(block);
873 be_emit_pad_comment();
874 be_emit_cstring(" /* preds:");
876 /* emit list of pred blocks in comment */
877 arity = get_irn_arity(block);
878 for (i = 0; i < arity; ++i) {
879 ir_node *predblock = get_Block_cfgpred_block(block, i);
880 be_emit_irprintf(" %d", get_irn_node_nr(predblock));
883 be_emit_cstring("\t/* ");
884 be_gas_emit_block_name(block);
885 be_emit_cstring(": ");
887 if (exec_freq != NULL) {
888 be_emit_irprintf(" freq: %f",
889 get_block_execfreq(exec_freq, block));
891 be_emit_cstring(" */\n");
892 be_emit_write_line();
896 * Walks over the nodes in a block connected by scheduling edges
897 * and emits code for each node.
899 static void arm_gen_block(ir_node *block, ir_node *prev_block)
903 arm_emit_block_header(block, prev_block);
904 be_dbg_set_dbg_info(get_irn_dbg_info(block));
905 sched_foreach(block, irn) {
912 * Sets labels for control flow nodes (jump target)
914 static void arm_gen_labels(ir_node *block, void *env)
917 int n = get_Block_n_cfgpreds(block);
920 for (n--; n >= 0; n--) {
921 pred = get_Block_cfgpred(block, n);
922 set_irn_link(pred, block);
927 * Compare two entries of the symbol or tarval set.
929 static int cmp_sym_or_tv(const void *elt, const void *key, size_t size)
931 const sym_or_tv_t *p1 = (const sym_or_tv_t*)elt;
932 const sym_or_tv_t *p2 = (const sym_or_tv_t*)key;
935 /* as an identifier NEVER can point to a tarval, it's enough
936 to compare it this way */
937 return p1->u.generic != p2->u.generic;
940 void arm_gen_routine(ir_graph *irg)
942 ir_node *last_block = NULL;
943 ir_entity *entity = get_irg_entity(irg);
944 const arch_env_t *arch_env = be_get_irg_arch_env(irg);
948 isa = (arm_isa_t*) arch_env;
949 sym_or_tv = new_set(cmp_sym_or_tv, 8);
951 be_gas_elf_type_char = '%';
953 arm_register_emitters();
955 /* create the block schedule */
956 blk_sched = be_create_block_schedule(irg);
958 be_gas_emit_function_prolog(entity, 4);
960 irg_block_walk_graph(irg, arm_gen_labels, NULL, NULL);
962 n = ARR_LEN(blk_sched);
963 for (i = 0; i < n;) {
964 ir_node *block, *next_bl;
966 block = blk_sched[i];
968 next_bl = i < n ? blk_sched[i] : NULL;
970 /* set here the link. the emitter expects to find the next block here */
971 set_irn_link(block, next_bl);
972 arm_gen_block(block, last_block);
976 /* emit SymConst values */
977 if (set_count(sym_or_tv) > 0) {
980 be_emit_cstring("\t.align 2\n");
982 foreach_set(sym_or_tv, sym_or_tv_t*, entry) {
983 emit_constant_name(entry);
984 be_emit_cstring(":\n");
985 be_emit_write_line();
987 if (entry->is_entity) {
988 be_emit_cstring("\t.word\t");
989 be_gas_emit_entity(entry->u.entity);
991 be_emit_write_line();
993 ir_tarval *tv = entry->u.tv;
995 int size = get_mode_size_bytes(get_tarval_mode(tv));
997 /* beware: ARM fpa uses big endian format */
998 for (vi = ((size + 3) & ~3) - 4; vi >= 0; vi -= 4) {
1001 v = get_tarval_sub_bits(tv, vi+3);
1002 v = (v << 8) | get_tarval_sub_bits(tv, vi+2);
1003 v = (v << 8) | get_tarval_sub_bits(tv, vi+1);
1004 v = (v << 8) | get_tarval_sub_bits(tv, vi+0);
1005 be_emit_irprintf("\t.word\t%u\n", v);
1006 be_emit_write_line();
1011 be_emit_write_line();
1015 be_gas_emit_function_epilog(entity);
1018 void arm_init_emitter(void)
1020 FIRM_DBG_REGISTER(dbg, "firm.be.arm.emit");