nsz Git - libfirm/blob - ir/be/arm/arm_cconv.c

   1 /*
   2  * Copyright (C) 1995-2008 University of Karlsruhe.  All right reserved.
   3  *
   4  * This file is part of libFirm.
   5  *
   6  * This file may be distributed and/or modified under the terms of the
   7  * GNU General Public License version 2 as published by the Free Software
   8  * Foundation and appearing in the file LICENSE.GPL included in the
   9  * packaging of this file.
  10  *
  11  * Licensees holding valid libFirm Professional Edition licenses may use
  12  * this file in accordance with the libFirm Commercial License.
  13  * Agreement provided with the Software.
  14  *
  15  * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
  16  * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  17  * PURPOSE.
  18  */
  19
  20 /**
  21  * @file
  22  * @brief   calling convention helpers
  23  * @author  Matthias Braun
  24  */
  25 #include "config.h"
  26
  27 #include "arm_cconv.h"
  28 #include "irmode.h"
  29 #include "typerep.h"
  30 #include "xmalloc.h"
  31 #include "error.h"
  32 #include "util.h"
  33
  34 static const unsigned ignore_regs[] = {
  35         REG_R12,
  36         REG_SP,
  37         REG_PC,
  38         REG_FL,
  39 };
  40
  41 static const arch_register_t* const param_regs[] = {
  42         &arm_registers[REG_R0],
  43         &arm_registers[REG_R1],
  44         &arm_registers[REG_R2],
  45         &arm_registers[REG_R3]
  46 };
  47
  48 static const arch_register_t* const result_regs[] = {
  49         &arm_registers[REG_R0],
  50         &arm_registers[REG_R1],
  51         &arm_registers[REG_R2],
  52         &arm_registers[REG_R3]
  53 };
  54
  55 static const arch_register_t* const float_result_regs[] = {
  56         &arm_registers[REG_F0],
  57         &arm_registers[REG_F1]
  58 };
  59
  60 calling_convention_t *arm_decide_calling_convention(const ir_graph *irg,
  61                                                     ir_type *function_type)
  62 {
  63         unsigned              stack_offset      = 0;
  64         unsigned              n_param_regs_used = 0;
  65         reg_or_stackslot_t   *params;
  66         reg_or_stackslot_t   *results;
  67         int                   n_param_regs
  68                 = sizeof(param_regs)/sizeof(param_regs[0]);
  69         int                   n_result_regs
  70                 = sizeof(result_regs)/sizeof(result_regs[0]);
  71         int                   n_float_result_regs
  72                 = sizeof(float_result_regs)/sizeof(float_result_regs[0]);
  73         int                   n_params;
  74         int                   n_results;
  75         int                   i;
  76         int                   regnum;
  77         int                   float_regnum;
  78         calling_convention_t *cconv;
  79
  80         /* determine how parameters are passed */
  81         n_params = get_method_n_params(function_type);
  82         regnum   = 0;
  83         params   = XMALLOCNZ(reg_or_stackslot_t, n_params);
  84
  85         for (i = 0; i < n_params; ++i) {
  86                 ir_type            *param_type = get_method_param_type(function_type,i);
  87                 ir_mode            *mode       = get_type_mode(param_type);
  88                 int                 bits       = get_mode_size_bits(mode);
  89                 reg_or_stackslot_t *param      = &params[i];
  90                 param->type = param_type;
  91
  92                 if (regnum < n_param_regs) {
  93                         const arch_register_t *reg = param_regs[regnum++];
  94                         param->reg0 = reg;
  95                 } else {
  96                         param->offset = stack_offset;
  97                         /* increase offset 4 bytes so everything is aligned */
  98                         stack_offset += bits > 32 ? bits/8 : 4;
  99                         continue;
 100                 }
 101
 102                 /* we might need a 2nd 32bit component (for 64bit or double values) */
 103                 if (bits > 32) {
 104                         if (bits > 64)
 105                                 panic("only 32 and 64bit modes supported in arm backend");
 106
 107                         if (regnum < n_param_regs) {
 108                                 const arch_register_t *reg = param_regs[regnum++];
 109                                 param->reg1 = reg;
 110                         } else {
 111                                 ir_mode *pmode = param_regs[0]->reg_class->mode;
 112                                 ir_type *type  = get_type_for_mode(pmode);
 113                                 param->type    = type;
 114                                 param->offset  = stack_offset;
 115                                 assert(get_mode_size_bits(pmode) == 32);
 116                                 stack_offset += 4;
 117                         }
 118                 }
 119         }
 120         n_param_regs_used = regnum;
 121
 122         n_results    = get_method_n_ress(function_type);
 123         regnum       = 0;
 124         float_regnum = 0;
 125         results      = XMALLOCNZ(reg_or_stackslot_t, n_results);
 126         for (i = 0; i < n_results; ++i) {
 127                 ir_type            *result_type = get_method_res_type(function_type, i);
 128                 ir_mode            *result_mode = get_type_mode(result_type);
 129                 reg_or_stackslot_t *result      = &results[i];
 130
 131                 if (mode_is_float(result_mode)) {
 132                         if (float_regnum >= n_float_result_regs) {
 133                                 panic("Too many float results for arm backend");
 134                         } else {
 135                                 const arch_register_t *reg = float_result_regs[float_regnum++];
 136                                 result->reg0 = reg;
 137                         }
 138                 } else {
 139                         if (get_mode_size_bits(result_mode) > 32) {
 140                                 panic("Results with more than 32bits not supported by arm backend yet");
 141                         }
 142
 143                         if (regnum >= n_result_regs) {
 144                                 panic("Too many results for arm backend");
 145                         } else {
 146                                 const arch_register_t *reg = result_regs[regnum++];
 147                                 result->reg0 = reg;
 148                         }
 149                 }
 150         }
 151
 152         cconv                   = XMALLOCZ(calling_convention_t);
 153         cconv->parameters       = params;
 154         cconv->param_stack_size = stack_offset;
 155         cconv->n_reg_params     = n_param_regs_used;
 156         cconv->results          = results;
 157
 158         /* setup allocatable registers */
 159         if (irg != NULL) {
 160                 be_irg_t       *birg      = be_birg_from_irg(irg);
 161                 size_t          n_ignores = ARRAY_SIZE(ignore_regs);
 162                 struct obstack *obst      = &birg->obst;
 163                 size_t          r;
 164
 165                 assert(birg->allocatable_regs == NULL);
 166                 birg->allocatable_regs = rbitset_obstack_alloc(obst, N_ARM_REGISTERS);
 167                 rbitset_set_all(birg->allocatable_regs, N_ARM_REGISTERS);
 168                 for (r = 0; r < n_ignores; ++r) {
 169                         rbitset_clear(birg->allocatable_regs, ignore_regs[r]);
 170                 }
 171         }
 172
 173         return cconv;
 174 }
 175
 176 void arm_free_calling_convention(calling_convention_t *cconv)
 177 {
 178         free(cconv->parameters);
 179         free(cconv->results);
 180         free(cconv);
 181 }