nsz Git - libfirm/blob - ir/be/arm/arm_cconv.c

   1 /*
   2  * Copyright (C) 1995-2008 University of Karlsruhe.  All right reserved.
   3  *
   4  * This file is part of libFirm.
   5  *
   6  * This file may be distributed and/or modified under the terms of the
   7  * GNU General Public License version 2 as published by the Free Software
   8  * Foundation and appearing in the file LICENSE.GPL included in the
   9  * packaging of this file.
  10  *
  11  * Licensees holding valid libFirm Professional Edition licenses may use
  12  * this file in accordance with the libFirm Commercial License.
  13  * Agreement provided with the Software.
  14  *
  15  * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
  16  * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  17  * PURPOSE.
  18  */
  19
  20 /**
  21  * @file
  22  * @brief   calling convention helpers
  23  * @author  Matthias Braun
  24  * @version $Id$
  25  */
  26 #include "config.h"
  27
  28 #include "arm_cconv.h"
  29 #include "irmode.h"
  30 #include "typerep.h"
  31 #include "xmalloc.h"
  32 #include "error.h"
  33 #include "util.h"
  34
  35 static const unsigned ignore_regs[] = {
  36         REG_R12,
  37         REG_SP,
  38         REG_PC,
  39         REG_FL,
  40 };
  41
  42 static const arch_register_t* const param_regs[] = {
  43         &arm_registers[REG_R0],
  44         &arm_registers[REG_R1],
  45         &arm_registers[REG_R2],
  46         &arm_registers[REG_R3]
  47 };
  48
  49 static const arch_register_t* const result_regs[] = {
  50         &arm_registers[REG_R0],
  51         &arm_registers[REG_R1],
  52         &arm_registers[REG_R2],
  53         &arm_registers[REG_R3]
  54 };
  55
  56 static const arch_register_t* const float_result_regs[] = {
  57         &arm_registers[REG_F0],
  58         &arm_registers[REG_F1]
  59 };
  60
  61 calling_convention_t *arm_decide_calling_convention(const ir_graph *irg,
  62                                                     ir_type *function_type)
  63 {
  64         unsigned              stack_offset      = 0;
  65         unsigned              n_param_regs_used = 0;
  66         reg_or_stackslot_t   *params;
  67         reg_or_stackslot_t   *results;
  68         int                   n_param_regs
  69                 = sizeof(param_regs)/sizeof(param_regs[0]);
  70         int                   n_result_regs
  71                 = sizeof(result_regs)/sizeof(result_regs[0]);
  72         int                   n_float_result_regs
  73                 = sizeof(float_result_regs)/sizeof(float_result_regs[0]);
  74         int                   n_params;
  75         int                   n_results;
  76         int                   i;
  77         int                   regnum;
  78         int                   float_regnum;
  79         calling_convention_t *cconv;
  80
  81         /* determine how parameters are passed */
  82         n_params = get_method_n_params(function_type);
  83         regnum   = 0;
  84         params   = XMALLOCNZ(reg_or_stackslot_t, n_params);
  85
  86         for (i = 0; i < n_params; ++i) {
  87                 ir_type            *param_type = get_method_param_type(function_type,i);
  88                 ir_mode            *mode       = get_type_mode(param_type);
  89                 int                 bits       = get_mode_size_bits(mode);
  90                 reg_or_stackslot_t *param      = &params[i];
  91                 param->type = param_type;
  92
  93                 if (regnum < n_param_regs) {
  94                         const arch_register_t *reg = param_regs[regnum++];
  95                         param->reg0 = reg;
  96                 } else {
  97                         param->offset = stack_offset;
  98                         /* increase offset 4 bytes so everything is aligned */
  99                         stack_offset += bits > 32 ? bits/8 : 4;
 100                         continue;
 101                 }
 102
 103                 /* we might need a 2nd 32bit component (for 64bit or double values) */
 104                 if (bits > 32) {
 105                         if (bits > 64)
 106                                 panic("only 32 and 64bit modes supported in arm backend");
 107
 108                         if (regnum < n_param_regs) {
 109                                 const arch_register_t *reg = param_regs[regnum++];
 110                                 param->reg1 = reg;
 111                         } else {
 112                                 ir_mode *pmode = param_regs[0]->reg_class->mode;
 113                                 ir_type *type  = get_type_for_mode(pmode);
 114                                 param->type    = type;
 115                                 param->offset  = stack_offset;
 116                                 assert(get_mode_size_bits(pmode) == 32);
 117                                 stack_offset += 4;
 118                         }
 119                 }
 120         }
 121         n_param_regs_used = regnum;
 122
 123         n_results    = get_method_n_ress(function_type);
 124         regnum       = 0;
 125         float_regnum = 0;
 126         results      = XMALLOCNZ(reg_or_stackslot_t, n_results);
 127         for (i = 0; i < n_results; ++i) {
 128                 ir_type            *result_type = get_method_res_type(function_type, i);
 129                 ir_mode            *result_mode = get_type_mode(result_type);
 130                 reg_or_stackslot_t *result      = &results[i];
 131
 132                 if (mode_is_float(result_mode)) {
 133                         if (float_regnum >= n_float_result_regs) {
 134                                 panic("Too many float results for arm backend");
 135                         } else {
 136                                 const arch_register_t *reg = float_result_regs[float_regnum++];
 137                                 result->reg0 = reg;
 138                         }
 139                 } else {
 140                         if (get_mode_size_bits(result_mode) > 32) {
 141                                 panic("Results with more than 32bits not supported by arm backend yet");
 142                         }
 143
 144                         if (regnum >= n_result_regs) {
 145                                 panic("Too many results for arm backend");
 146                         } else {
 147                                 const arch_register_t *reg = result_regs[regnum++];
 148                                 result->reg0 = reg;
 149                         }
 150                 }
 151         }
 152
 153         cconv                   = XMALLOCZ(calling_convention_t);
 154         cconv->parameters       = params;
 155         cconv->param_stack_size = stack_offset;
 156         cconv->n_reg_params     = n_param_regs_used;
 157         cconv->results          = results;
 158
 159         /* setup allocatable registers */
 160         if (irg != NULL) {
 161                 be_irg_t       *birg      = be_birg_from_irg(irg);
 162                 size_t          n_ignores = ARRAY_SIZE(ignore_regs);
 163                 struct obstack *obst      = &birg->obst;
 164                 size_t          r;
 165
 166                 assert(birg->allocatable_regs == NULL);
 167                 birg->allocatable_regs = rbitset_obstack_alloc(obst, N_ARM_REGISTERS);
 168                 rbitset_set_all(birg->allocatable_regs, N_ARM_REGISTERS);
 169                 for (r = 0; r < n_ignores; ++r) {
 170                         rbitset_clear(birg->allocatable_regs, ignore_regs[r]);
 171                 }
 172         }
 173
 174         return cconv;
 175 }
 176
 177 void arm_free_calling_convention(calling_convention_t *cconv)
 178 {
 179         free(cconv->parameters);
 180         free(cconv->results);
 181         free(cconv);
 182 }