2 * This file is part of libFirm.
3 * Copyright (C) 2012 University of Karlsruhe.
8 * @brief code selection (transform FIRM into amd64 FIRM)
13 #include "irgraph_t.h"
23 #include "betranshlp.h"
25 #include "bearch_amd64_t.h"
27 #include "amd64_nodes_attr.h"
28 #include "amd64_transform.h"
29 #include "amd64_new_nodes.h"
31 #include "gen_amd64_regalloc_if.h"
33 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
35 /* Some support functions: */
37 static inline int mode_needs_gp_reg(ir_mode *mode)
39 return mode_is_int(mode) || mode_is_reference(mode);
43 * Create a DAG constructing a given Const.
45 * @param irn a Firm const
47 static ir_node *create_const_graph(ir_node *irn, ir_node *block)
49 ir_tarval *tv = get_Const_tarval(irn);
50 ir_mode *mode = get_tarval_mode(tv);
51 dbg_info *dbgi = get_irn_dbg_info(irn);
54 if (mode_is_reference(mode)) {
55 /* AMD64 is 64bit, so we can safely convert a reference tarval into Iu */
56 assert(get_mode_size_bits(mode) == get_mode_size_bits(mode_Lu));
57 tv = tarval_convert_to(tv, mode_Lu);
60 value = get_tarval_long(tv);
62 return new_bd_amd64_Immediate(dbgi, block, value);
65 /* Op transformers: */
68 * Transforms a Const node.
70 * @return The transformed AMD64 node.
72 static ir_node *gen_Const(ir_node *node) {
73 ir_node *block = be_transform_node(get_nodes_block(node));
74 ir_mode *mode = get_irn_mode(node);
75 ir_node *res = create_const_graph(node, block);
82 * Transforms a SymConst node.
84 * @return The transformed ARM node.
86 static ir_node *gen_SymConst(ir_node *node)
88 ir_node *block = be_transform_node(get_nodes_block(node));
89 ir_entity *entity = get_SymConst_entity(node);
90 dbg_info *dbgi = get_irn_dbg_info(node);
93 new_node = new_bd_amd64_SymConst(dbgi, block, entity);
98 * Transforms an Add node.
100 * @return The transformed AMD64 node.
102 static ir_node *gen_Add(ir_node *node) {
103 ir_node *block = be_transform_node(get_nodes_block(node));
104 ir_node *op1 = get_Add_left(node);
105 ir_node *op2 = get_Add_right(node);
106 dbg_info *dbgi = get_irn_dbg_info(node);
107 ir_node *new_op1 = be_transform_node(op1);
108 ir_node *new_op2 = be_transform_node(op2);
110 ir_node *res = new_bd_amd64_Add(dbgi, block, new_op1, new_op2);
115 * Transforms an Sub node.
117 * @return The transformed AMD64 node.
119 static ir_node *gen_Sub(ir_node *node) {
120 ir_node *block = be_transform_node(get_nodes_block(node));
121 ir_node *op1 = get_Sub_left(node);
122 ir_node *op2 = get_Sub_right(node);
123 dbg_info *dbgi = get_irn_dbg_info(node);
124 ir_node *new_op1 = be_transform_node(op1);
125 ir_node *new_op2 = be_transform_node(op2);
127 ir_node *res = new_bd_amd64_Sub(dbgi, block, new_op1, new_op2);
131 static ir_node *gen_Mul(ir_node *node) {
132 ir_node *block = be_transform_node(get_nodes_block(node));
133 ir_node *op1 = get_Mul_left(node);
134 ir_node *op2 = get_Mul_right(node);
135 dbg_info *dbgi = get_irn_dbg_info(node);
136 ir_node *new_op1 = be_transform_node(op1);
137 ir_node *new_op2 = be_transform_node(op2);
139 ir_node *res = new_bd_amd64_Mul(dbgi, block, new_op1, new_op2);
143 static ir_node *gen_Minus(ir_node *node)
145 ir_node *block = be_transform_node(get_nodes_block(node));
146 ir_node *val = be_transform_node(get_Minus_op(node));
147 dbg_info *dbgi = get_irn_dbg_info(node);
149 return new_bd_amd64_Neg(dbgi, block, val);
152 static ir_node *gen_Jmp(ir_node *node)
154 ir_node *block = get_nodes_block(node);
155 ir_node *new_block = be_transform_node(block);
156 dbg_info *dbgi = get_irn_dbg_info(node);
158 return new_bd_amd64_Jmp(dbgi, new_block);
161 static ir_node *gen_be_Call(ir_node *node)
163 ir_node *res = be_duplicate_node(node);
164 arch_add_irn_flags(res, arch_irn_flags_modify_flags);
169 static ir_node *gen_Cmp(ir_node *node)
171 ir_node *block = be_transform_node(get_nodes_block(node));
172 ir_node *op1 = get_Cmp_left(node);
173 ir_node *op2 = get_Cmp_right(node);
174 ir_mode *cmp_mode = get_irn_mode(op1);
175 dbg_info *dbgi = get_irn_dbg_info(node);
180 if (mode_is_float(cmp_mode)) {
181 panic("Floating point not implemented yet!");
184 assert(get_irn_mode(op2) == cmp_mode);
185 is_unsigned = !mode_is_signed(cmp_mode);
187 new_op1 = be_transform_node(op1);
188 /* new_op1 = gen_extension(dbgi, block, new_op1, cmp_mode); */
189 new_op2 = be_transform_node(op2);
190 /* new_op2 = gen_extension(dbgi, block, new_op2, cmp_mode); */
191 return new_bd_amd64_Cmp(dbgi, block, new_op1, new_op2, false,
198 * @return the created ARM Cond node
200 static ir_node *gen_Cond(ir_node *node)
202 ir_node *const block = be_transform_node(get_nodes_block(node));
203 dbg_info *const dbgi = get_irn_dbg_info(node);
204 ir_node *const selector = get_Cond_selector(node);
205 ir_node *const flag_node = be_transform_node(selector);
206 ir_relation const relation = get_Cmp_relation(selector);
207 return new_bd_amd64_Jcc(dbgi, block, flag_node, relation);
210 static ir_node *gen_Phi(ir_node *node)
212 ir_mode *mode = get_irn_mode(node);
213 const arch_register_req_t *req;
214 if (mode_needs_gp_reg(mode)) {
215 /* all integer operations are on 64bit registers now */
217 req = amd64_reg_classes[CLASS_amd64_gp].class_req;
219 req = arch_no_register_req;
222 return be_transform_phi(node, req);
226 * Transforms a Conv node.
228 * @return The created ia32 Conv node
230 static ir_node *gen_Conv(ir_node *node)
232 ir_node *block = be_transform_node(get_nodes_block(node));
233 ir_node *op = get_Conv_op(node);
234 ir_node *new_op = be_transform_node(op);
235 ir_mode *src_mode = get_irn_mode(op);
236 ir_mode *dst_mode = get_irn_mode(node);
237 dbg_info *dbgi = get_irn_dbg_info(node);
239 if (src_mode == dst_mode)
242 if (mode_is_float(src_mode) || mode_is_float(dst_mode)) {
243 panic("float not supported yet");
244 } else { /* complete in gp registers */
245 int src_bits = get_mode_size_bits(src_mode);
246 int dst_bits = get_mode_size_bits(dst_mode);
249 if (src_bits == dst_bits) {
250 /* kill unnecessary conv */
254 if (src_bits < dst_bits) {
261 return new_bd_amd64_Conv(dbgi, block, new_op, min_mode);
266 * Transforms a Store.
268 * @return the created AMD64 Store node
270 static ir_node *gen_Store(ir_node *node)
272 ir_node *block = be_transform_node(get_nodes_block(node));
273 ir_node *ptr = get_Store_ptr(node);
274 ir_node *new_ptr = be_transform_node(ptr);
275 ir_node *mem = get_Store_mem(node);
276 ir_node *new_mem = be_transform_node(mem);
277 ir_node *val = get_Store_value(node);
278 ir_node *new_val = be_transform_node(val);
279 ir_mode *mode = get_irn_mode(val);
280 dbg_info *dbgi = get_irn_dbg_info(node);
281 ir_node *new_store = NULL;
283 if (mode_is_float(mode)) {
284 panic("Float not supported yet");
286 assert(mode_is_data(mode) && "unsupported mode for Store");
287 new_store = new_bd_amd64_Store(dbgi, block, new_ptr, new_val, new_mem, 0);
289 set_irn_pinned(new_store, get_irn_pinned(node));
296 * @return the created AMD64 Load node
298 static ir_node *gen_Load(ir_node *node)
300 ir_node *block = be_transform_node(get_nodes_block(node));
301 ir_node *ptr = get_Load_ptr(node);
302 ir_node *new_ptr = be_transform_node(ptr);
303 ir_node *mem = get_Load_mem(node);
304 ir_node *new_mem = be_transform_node(mem);
305 ir_mode *mode = get_Load_mode(node);
306 dbg_info *dbgi = get_irn_dbg_info(node);
307 ir_node *new_load = NULL;
309 if (mode_is_float(mode)) {
310 panic("Float not supported yet");
312 assert(mode_is_data(mode) && "unsupported mode for Load");
313 new_load = new_bd_amd64_Load(dbgi, block, new_ptr, new_mem, 0);
315 set_irn_pinned(new_load, get_irn_pinned(node));
321 * Transform a Proj from a Load.
323 static ir_node *gen_Proj_Load(ir_node *node)
325 ir_node *load = get_Proj_pred(node);
326 ir_node *new_load = be_transform_node(load);
327 dbg_info *dbgi = get_irn_dbg_info(node);
328 long proj = get_Proj_proj(node);
330 /* renumber the proj */
331 switch (get_amd64_irn_opcode(new_load)) {
333 /* handle all gp loads equal: they have the same proj numbers. */
334 if (proj == pn_Load_res) {
335 return new_rd_Proj(dbgi, new_load, mode_Lu, pn_amd64_Load_res);
336 } else if (proj == pn_Load_M) {
337 return new_rd_Proj(dbgi, new_load, mode_M, pn_amd64_Load_M);
341 panic("Unsupported Proj from Load");
344 return be_duplicate_node(node);
348 * Transform a Proj node.
350 static ir_node *gen_Proj(ir_node *node)
352 dbg_info *dbgi = get_irn_dbg_info(node);
353 ir_node *pred = get_Proj_pred(node);
354 long proj = get_Proj_proj(node);
358 if (is_Store(pred)) {
359 if (proj == pn_Store_M) {
360 return be_transform_node(pred);
362 panic("Unsupported Proj from Store");
364 } else if (is_Load(pred)) {
365 return gen_Proj_Load(node);
366 } else if (is_Start(pred)) {
369 return be_duplicate_node(node);
373 * Transforms a FrameAddr into an AMD64 Add.
375 static ir_node *gen_be_FrameAddr(ir_node *node)
377 ir_node *block = be_transform_node(get_nodes_block(node));
378 ir_entity *ent = be_get_frame_entity(node);
379 ir_node *fp = be_get_FrameAddr_frame(node);
380 ir_node *new_fp = be_transform_node(fp);
381 dbg_info *dbgi = get_irn_dbg_info(node);
384 new_node = new_bd_amd64_FrameAddr(dbgi, block, new_fp, ent);
388 /* Boilerplate code for transformation: */
390 static void amd64_register_transformers(void)
392 be_start_transform_setup();
394 be_set_transform_function(op_Const, gen_Const);
395 be_set_transform_function(op_SymConst, gen_SymConst);
396 be_set_transform_function(op_Add, gen_Add);
397 be_set_transform_function(op_Sub, gen_Sub);
398 be_set_transform_function(op_Mul, gen_Mul);
399 be_set_transform_function(op_be_Call, gen_be_Call);
400 be_set_transform_function(op_be_FrameAddr, gen_be_FrameAddr);
401 be_set_transform_function(op_Conv, gen_Conv);
402 be_set_transform_function(op_Jmp, gen_Jmp);
403 be_set_transform_function(op_Cmp, gen_Cmp);
404 be_set_transform_function(op_Cond, gen_Cond);
405 be_set_transform_function(op_Phi, gen_Phi);
406 be_set_transform_function(op_Load, gen_Load);
407 be_set_transform_function(op_Store, gen_Store);
408 be_set_transform_function(op_Proj, gen_Proj);
409 be_set_transform_function(op_Minus, gen_Minus);
412 void amd64_transform_graph(ir_graph *irg)
414 amd64_register_transformers();
415 be_transform_graph(irg, NULL);
418 void amd64_init_transform(void)
420 FIRM_DBG_REGISTER(dbg, "firm.be.amd64.transform");