2 * This file is part of libFirm.
3 * Copyright (C) 2012 University of Karlsruhe.
8 * @brief emit assembler for a backend graph
28 #include "beblocksched.h"
30 #include "amd64_emitter.h"
31 #include "gen_amd64_emitter.h"
32 #include "gen_amd64_regalloc_if.h"
33 #include "amd64_nodes_attr.h"
34 #include "amd64_new_nodes.h"
38 /*************************************************************
40 * (_) | | / _| | | | |
41 * _ __ _ __ _ _ __ | |_| |_ | |__ ___| |_ __ ___ _ __
42 * | '_ \| '__| | '_ \| __| _| | '_ \ / _ \ | '_ \ / _ \ '__|
43 * | |_) | | | | | | | |_| | | | | | __/ | |_) | __/ |
44 * | .__/|_| |_|_| |_|\__|_| |_| |_|\___|_| .__/ \___|_|
47 *************************************************************/
50 * Returns the target block for a control flow node.
52 static ir_node *get_cfop_target_block(const ir_node *irn)
54 return (ir_node*)get_irn_link(irn);
57 void amd64_emitf(ir_node const *const node, char const *fmt, ...)
64 char const *start = fmt;
66 while (*fmt != '%' && *fmt != '\n' && *fmt != '\0')
69 be_emit_string_len(start, fmt - start);
86 arch_register_t const *reg;
93 amd64_attr_t const *const attr = get_amd64_attr_const(node);
94 be_emit_irprintf("$0x%X", attr->ext.imm_value);
99 if (*fmt < '0' || '9' <= *fmt)
101 reg = arch_get_irn_register_out(node, *fmt++ - '0');
105 ir_entity const *const ent = va_arg(ap, ir_entity const*);
106 be_gas_emit_entity(ent);
111 ir_node *const block = get_cfop_target_block(node);
112 be_gas_emit_block_name(block);
117 amd64_SymConst_attr_t const *const attr = get_amd64_SymConst_attr_const(node);
119 be_emit_irprintf("%d", attr->fp_offset);
124 reg = va_arg(ap, arch_register_t const*);
127 be_emit_string(reg->name);
132 if ('0' <= *fmt && *fmt <= '9') {
134 } else if (*fmt == '*') {
136 pos = va_arg(ap, int);
140 reg = arch_get_irn_register_in(node, pos);
145 int const num = va_arg(ap, int);
146 be_emit_irprintf("%d", num);
151 char const *const str = va_arg(ap, char const*);
157 unsigned const num = va_arg(ap, unsigned);
158 be_emit_irprintf("%u", num);
164 panic("unknown format conversion");
168 be_emit_finish_line_gas(node);
172 /***********************************************************************************
175 * _ __ ___ __ _ _ _ __ | |_ _ __ __ _ _ __ ___ _____ _____ _ __| | __
176 * | '_ ` _ \ / _` | | '_ \ | _| '__/ _` | '_ ` _ \ / _ \ \ /\ / / _ \| '__| |/ /
177 * | | | | | | (_| | | | | | | | | | | (_| | | | | | | __/\ V V / (_) | | | <
178 * |_| |_| |_|\__,_|_|_| |_| |_| |_| \__,_|_| |_| |_|\___| \_/\_/ \___/|_| |_|\_\
180 ***********************************************************************************/
185 static void emit_amd64_SymConst(const ir_node *irn)
187 const amd64_SymConst_attr_t *attr = get_amd64_SymConst_attr_const(irn);
188 amd64_emitf(irn, "mov $%E, %D0", attr->entity);
194 static void emit_amd64_Conv(const ir_node *irn)
196 amd64_emitf(irn, "mov %S0, %D0");
201 * Returns the next block in a block schedule.
203 static ir_node *sched_next_block(const ir_node *block)
205 return (ir_node*)get_irn_link(block);
211 static void emit_amd64_Jmp(const ir_node *node)
213 ir_node *block, *next_block;
215 /* for now, the code works for scheduled and non-schedules blocks */
216 block = get_nodes_block(node);
218 /* we have a block schedule */
219 next_block = sched_next_block(block);
220 if (get_cfop_target_block(node) != next_block) {
221 amd64_emitf(node, "jmp %L");
222 } else if (be_options.verbose_asm) {
223 amd64_emitf(node, "/* fallthrough to %L */");
228 * Emit a Compare with conditional branch.
230 static void emit_amd64_Jcc(const ir_node *irn)
232 const ir_node *proj_true = NULL;
233 const ir_node *proj_false = NULL;
234 const ir_node *block;
235 const ir_node *next_block;
237 const amd64_attr_t *attr = get_amd64_attr_const(irn);
238 ir_relation relation = attr->ext.relation;
239 ir_node *op1 = get_irn_n(irn, 0);
240 const amd64_attr_t *cmp_attr = get_amd64_attr_const(op1);
241 bool is_signed = !cmp_attr->data.cmp_unsigned;
243 assert(is_amd64_Cmp(op1));
245 foreach_out_edge(irn, edge) {
246 ir_node *proj = get_edge_src_irn(edge);
247 long nr = get_Proj_proj(proj);
248 if (nr == pn_Cond_true) {
255 if (cmp_attr->data.ins_permuted) {
256 relation = get_inversed_relation(relation);
259 /* for now, the code works for scheduled and non-schedules blocks */
260 block = get_nodes_block(irn);
262 /* we have a block schedule */
263 next_block = sched_next_block(block);
265 assert(relation != ir_relation_false);
266 assert(relation != ir_relation_true);
268 if (get_cfop_target_block(proj_true) == next_block) {
269 /* exchange both proj's so the second one can be omitted */
270 const ir_node *t = proj_true;
272 proj_true = proj_false;
274 relation = get_negated_relation(relation);
277 switch (relation & ir_relation_less_equal_greater) {
278 case ir_relation_equal: suffix = "e"; break;
279 case ir_relation_less: suffix = is_signed ? "l" : "b"; break;
280 case ir_relation_less_equal: suffix = is_signed ? "le" : "be"; break;
281 case ir_relation_greater: suffix = is_signed ? "g" : "a"; break;
282 case ir_relation_greater_equal: suffix = is_signed ? "ge" : "ae"; break;
283 case ir_relation_less_greater: suffix = "ne"; break;
284 case ir_relation_less_equal_greater: suffix = "mp"; break;
285 default: panic("Cmp has unsupported pnc");
288 /* emit the true proj */
289 amd64_emitf(proj_true, "j%s %L", suffix);
291 if (get_cfop_target_block(proj_false) != next_block) {
292 amd64_emitf(proj_false, "jmp %L");
293 } else if (be_options.verbose_asm) {
294 amd64_emitf(proj_false, "/* fallthrough to %L */");
299 * Emits code for a call.
301 static void emit_be_Call(const ir_node *node)
303 ir_entity *entity = be_Call_get_entity(node);
305 /* %eax/%rax is used in AMD64 to pass the number of vector parameters for
306 * variable argument counts */
307 if (get_method_variadicity (be_Call_get_type((ir_node *) node))) {
308 /* But this still is a hack... */
309 amd64_emitf(node, "xor %%rax, %%rax");
313 amd64_emitf(node, "call %E", entity);
315 be_emit_pad_comment();
316 be_emit_cstring("/* FIXME: call NULL entity?! */\n");
323 static void emit_be_Copy(const ir_node *irn)
325 ir_mode *mode = get_irn_mode(irn);
327 if (arch_get_irn_register_in(irn, 0) == arch_get_irn_register_out(irn, 0)) {
332 if (mode_is_float(mode)) {
333 panic("move not supported for FP");
334 } else if (mode_is_data(mode)) {
335 amd64_emitf(irn, "mov %S0, %D0");
337 panic("move not supported for this mode");
341 static void emit_be_Perm(const ir_node *node)
343 const arch_register_t *in0, *in1;
345 in0 = arch_get_irn_register(get_irn_n(node, 0));
346 in1 = arch_get_irn_register(get_irn_n(node, 1));
348 arch_register_class_t const* const cls0 = in0->reg_class;
349 assert(cls0 == in1->reg_class && "Register class mismatch at Perm");
351 amd64_emitf(node, "xchg %R, %R", in0, in1);
353 if (cls0 != &amd64_reg_classes[CLASS_amd64_gp]) {
354 panic("unexpected register class in be_Perm (%+F)", node);
358 static void emit_amd64_FrameAddr(const ir_node *irn)
360 const amd64_SymConst_attr_t *attr =
361 (const amd64_SymConst_attr_t*) get_amd64_attr_const(irn);
363 amd64_emitf(irn, "mov %S0, %D0");
364 amd64_emitf(irn, "add $%u, %D0", attr->fp_offset);
368 * Emits code to increase stack pointer.
370 static void emit_be_IncSP(const ir_node *node)
372 int offs = be_get_IncSP_offset(node);
378 amd64_emitf(node, "sub, $%d, %D0", offs);
380 amd64_emitf(node, "add, $%d, %D0", -offs);
385 * Emits code for a return.
387 static void emit_be_Return(const ir_node *node)
389 be_emit_cstring("\tret");
390 be_emit_finish_line_gas(node);
394 static void emit_amd64_binop_op(const ir_node *irn, int second_op)
396 if (irn->op == op_amd64_Add) {
397 amd64_emitf(irn, "add %S*, %D0", second_op);
398 } else if (irn->op == op_amd64_Sub) {
399 amd64_emitf(irn, "neg %S*", second_op);
400 amd64_emitf(irn, "add %S*, %D0", second_op);
401 amd64_emitf(irn, "neg %S*", second_op);
407 * Emits an arithmetic operation that handles arbitraty input registers.
409 static void emit_amd64_binop(const ir_node *irn)
411 const arch_register_t *reg_s1 = arch_get_irn_register_in(irn, 0);
412 const arch_register_t *reg_s2 = arch_get_irn_register_in(irn, 1);
413 const arch_register_t *reg_d1 = arch_get_irn_register_out(irn, 0);
417 if (reg_d1 != reg_s1 && reg_d1 != reg_s2) {
418 amd64_emitf(irn, "mov %R, %R", reg_s1, reg_d1);
420 } else if (reg_d1 == reg_s2 && reg_d1 != reg_s1) {
424 emit_amd64_binop_op(irn, second_op);
428 * Enters the emitter functions for handled nodes into the generic
429 * pointer of an opcode.
431 static void amd64_register_emitters(void)
433 /* first clear the generic function pointer for all ops */
434 ir_clear_opcodes_generic_func();
436 /* register all emitter functions defined in spec */
437 amd64_register_spec_emitters();
439 be_set_emitter(op_amd64_Add, emit_amd64_binop);
440 be_set_emitter(op_amd64_Conv, emit_amd64_Conv);
441 be_set_emitter(op_amd64_FrameAddr, emit_amd64_FrameAddr);
442 be_set_emitter(op_amd64_Jcc, emit_amd64_Jcc);
443 be_set_emitter(op_amd64_Jmp, emit_amd64_Jmp);
444 be_set_emitter(op_amd64_Sub, emit_amd64_binop);
445 be_set_emitter(op_amd64_SymConst, emit_amd64_SymConst);
446 be_set_emitter(op_be_Call, emit_be_Call);
447 be_set_emitter(op_be_Copy, emit_be_Copy);
448 be_set_emitter(op_be_IncSP, emit_be_IncSP);
449 be_set_emitter(op_be_Perm, emit_be_Perm);
450 be_set_emitter(op_be_Return, emit_be_Return);
452 be_set_emitter(op_Phi, be_emit_nothing);
453 be_set_emitter(op_be_Keep, be_emit_nothing);
454 be_set_emitter(op_be_Start, be_emit_nothing);
458 * Walks over the nodes in a block connected by scheduling edges
459 * and emits code for each node.
461 static void amd64_gen_block(ir_node *block, void *data)
465 if (! is_Block(block))
468 be_gas_begin_block(block, true);
470 sched_foreach(block, node) {
477 * Sets labels for control flow nodes (jump target)
478 * TODO: Jump optimization
480 static void amd64_gen_labels(ir_node *block, void *env)
483 int n = get_Block_n_cfgpreds(block);
486 for (n--; n >= 0; n--) {
487 pred = get_Block_cfgpred(block, n);
488 set_irn_link(pred, block);
495 void amd64_gen_routine(ir_graph *irg)
497 ir_entity *entity = get_irg_entity(irg);
501 /* register all emitter functions */
502 amd64_register_emitters();
504 blk_sched = be_create_block_schedule(irg);
506 be_gas_emit_function_prolog(entity, 4, NULL);
508 irg_block_walk_graph(irg, amd64_gen_labels, NULL, NULL);
510 n = ARR_LEN(blk_sched);
511 for (i = 0; i < n; i++) {
512 ir_node *block = blk_sched[i];
513 ir_node *next = (i + 1) < n ? blk_sched[i+1] : NULL;
515 set_irn_link(block, next);
518 for (i = 0; i < n; ++i) {
519 ir_node *block = blk_sched[i];
521 amd64_gen_block(block, 0);
524 be_gas_emit_function_epilog(entity);