2 * Copyright (C) 1995-2011 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief emit assembler for a backend graph
40 #include "beblocksched.h"
42 #include "amd64_emitter.h"
43 #include "gen_amd64_emitter.h"
44 #include "gen_amd64_regalloc_if.h"
45 #include "amd64_nodes_attr.h"
46 #include "amd64_new_nodes.h"
50 /*************************************************************
52 * (_) | | / _| | | | |
53 * _ __ _ __ _ _ __ | |_| |_ | |__ ___| |_ __ ___ _ __
54 * | '_ \| '__| | '_ \| __| _| | '_ \ / _ \ | '_ \ / _ \ '__|
55 * | |_) | | | | | | | |_| | | | | | __/ | |_) | __/ |
56 * | .__/|_| |_|_| |_|\__|_| |_| |_|\___|_| .__/ \___|_|
59 *************************************************************/
61 void amd64_emit_register(const arch_register_t *reg)
64 be_emit_string(arch_register_get_name(reg));
67 void amd64_emit_immediate(const ir_node *node)
69 const amd64_attr_t *attr = get_amd64_attr_const (node);
71 be_emit_irprintf("0x%X", attr->ext.imm_value);
74 void amd64_emit_fp_offset(const ir_node *node)
76 const amd64_SymConst_attr_t *attr = get_amd64_SymConst_attr_const(node);
78 be_emit_irprintf("%d", attr->fp_offset);
81 void amd64_emit_source_register(const ir_node *node, int pos)
83 amd64_emit_register(arch_get_irn_register_in(node, pos));
86 void amd64_emit_dest_register(const ir_node *node, int pos)
88 amd64_emit_register(arch_get_irn_register_out(node, pos));
92 * Returns the target label for a control flow node.
95 static void amd64_emit_cfop_target(const ir_node *node)
97 ir_node *block = get_irn_link(node);
99 be_emit_irprintf("BLOCK_%ld", get_irn_node_nr(block));
103 /***********************************************************************************
106 * _ __ ___ __ _ _ _ __ | |_ _ __ __ _ _ __ ___ _____ _____ _ __| | __
107 * | '_ ` _ \ / _` | | '_ \ | _| '__/ _` | '_ ` _ \ / _ \ \ /\ / / _ \| '__| |/ /
108 * | | | | | | (_| | | | | | | | | | | (_| | | | | | | __/\ V V / (_) | | | <
109 * |_| |_| |_|\__,_|_|_| |_| |_| |_| \__,_|_| |_| |_|\___| \_/\_/ \___/|_| |_|\_\
111 ***********************************************************************************/
114 * Default emitter for anything that we don't want to generate code for.
116 static void emit_nothing(const ir_node *node)
124 static void emit_amd64_SymConst(const ir_node *irn)
126 const amd64_SymConst_attr_t *attr = get_amd64_SymConst_attr_const(irn);
128 sym_or_tv_t key, *entry;
131 key.u.id = get_entity_ld_ident(attr->entity);
134 entry = set_insert(sym_or_tv_t, sym_or_tv, &key, sizeof(key), hash_ptr(key.u.generic));
135 if (entry->label == 0) {
136 /* allocate a label */
137 entry->label = get_unique_label();
139 label = entry->label;
142 be_emit_cstring("\tmov $");
143 be_gas_emit_entity(attr->entity);
144 be_emit_cstring(", ");
145 amd64_emit_dest_register(irn, 0);
146 be_emit_finish_line_gas(irn);
152 static void emit_amd64_Conv(const ir_node *irn)
154 be_emit_cstring("\tmov ");
155 amd64_emit_source_register(irn, 0);
156 be_emit_cstring(", ");
157 amd64_emit_dest_register(irn, 0);
158 be_emit_finish_line_gas(irn);
163 * Returns the next block in a block schedule.
165 static ir_node *sched_next_block(const ir_node *block)
167 return (ir_node*)get_irn_link(block);
171 * Returns the target block for a control flow node.
173 static ir_node *get_cfop_target_block(const ir_node *irn)
175 return (ir_node*)get_irn_link(irn);
179 * Emit the target label for a control flow node.
181 static void amd64_emit_cfop_target(const ir_node *irn)
183 ir_node *block = get_cfop_target_block(irn);
185 be_gas_emit_block_name(block);
191 static void emit_amd64_Jmp(const ir_node *node)
193 ir_node *block, *next_block;
195 /* for now, the code works for scheduled and non-schedules blocks */
196 block = get_nodes_block(node);
198 /* we have a block schedule */
199 next_block = sched_next_block(block);
200 if (get_cfop_target_block(node) != next_block) {
201 be_emit_cstring("\tjmp ");
202 amd64_emit_cfop_target(node);
204 if (be_options.verbose_asm) {
205 be_emit_cstring("\t/* fallthrough to ");
206 amd64_emit_cfop_target(node);
207 be_emit_cstring(" */");
210 be_emit_finish_line_gas(node);
214 * Emit a Compare with conditional branch.
216 static void emit_amd64_Jcc(const ir_node *irn)
218 const ir_node *proj_true = NULL;
219 const ir_node *proj_false = NULL;
220 const ir_node *block;
221 const ir_node *next_block;
223 const amd64_attr_t *attr = get_amd64_attr_const(irn);
224 ir_relation relation = attr->ext.relation;
225 ir_node *op1 = get_irn_n(irn, 0);
226 const amd64_attr_t *cmp_attr = get_amd64_attr_const(op1);
227 bool is_signed = !cmp_attr->data.cmp_unsigned;
229 assert(is_amd64_Cmp(op1));
231 foreach_out_edge(irn, edge) {
232 ir_node *proj = get_edge_src_irn(edge);
233 long nr = get_Proj_proj(proj);
234 if (nr == pn_Cond_true) {
241 if (cmp_attr->data.ins_permuted) {
242 relation = get_inversed_relation(relation);
245 /* for now, the code works for scheduled and non-schedules blocks */
246 block = get_nodes_block(irn);
248 /* we have a block schedule */
249 next_block = sched_next_block(block);
251 assert(relation != ir_relation_false);
252 assert(relation != ir_relation_true);
254 if (get_cfop_target_block(proj_true) == next_block) {
255 /* exchange both proj's so the second one can be omitted */
256 const ir_node *t = proj_true;
258 proj_true = proj_false;
260 relation = get_negated_relation(relation);
263 switch (relation & ir_relation_less_equal_greater) {
264 case ir_relation_equal: suffix = "e"; break;
265 case ir_relation_less: suffix = is_signed ? "l" : "b"; break;
266 case ir_relation_less_equal: suffix = is_signed ? "le" : "be"; break;
267 case ir_relation_greater: suffix = is_signed ? "g" : "a"; break;
268 case ir_relation_greater_equal: suffix = is_signed ? "ge" : "ae"; break;
269 case ir_relation_less_greater: suffix = "ne"; break;
270 case ir_relation_less_equal_greater: suffix = "mp"; break;
271 default: panic("Cmp has unsupported pnc");
274 /* emit the true proj */
275 be_emit_irprintf("\tj%s ", suffix);
276 amd64_emit_cfop_target(proj_true);
277 be_emit_finish_line_gas(proj_true);
279 if (get_cfop_target_block(proj_false) == next_block) {
280 if (be_options.verbose_asm) {
281 be_emit_cstring("\t/* fallthrough to ");
282 amd64_emit_cfop_target(proj_false);
283 be_emit_cstring(" */");
284 be_emit_finish_line_gas(proj_false);
287 be_emit_cstring("\tjmp ");
288 amd64_emit_cfop_target(proj_false);
289 be_emit_finish_line_gas(proj_false);
294 * Emits code for a call.
296 static void emit_be_Call(const ir_node *node)
298 ir_entity *entity = be_Call_get_entity(node);
300 /* %eax/%rax is used in AMD64 to pass the number of vector parameters for
301 * variable argument counts */
302 if (get_method_variadicity (be_Call_get_type((ir_node *) node))) {
303 /* But this still is a hack... */
304 be_emit_cstring("\txor %rax, %rax");
305 be_emit_finish_line_gas(node);
309 be_emit_cstring("\tcall ");
310 be_gas_emit_entity (be_Call_get_entity(node));
311 be_emit_finish_line_gas(node);
313 be_emit_pad_comment();
314 be_emit_cstring("/* FIXME: call NULL entity?! */\n");
321 static void emit_be_Copy(const ir_node *irn)
323 ir_mode *mode = get_irn_mode(irn);
325 if (arch_get_irn_register_in(irn, 0) == arch_get_irn_register_out(irn, 0)) {
330 if (mode_is_float(mode)) {
331 panic("emit_be_Copy: move not supported for FP");
332 } else if (mode_is_data(mode)) {
333 be_emit_cstring("\tmov ");
334 amd64_emit_source_register(irn, 0);
335 be_emit_cstring(", ");
336 amd64_emit_dest_register(irn, 0);
337 be_emit_finish_line_gas(irn);
339 panic("emit_be_Copy: move not supported for this mode");
343 static void emit_be_Perm(const ir_node *node)
345 const arch_register_t *in0, *in1;
346 const arch_register_class_t *cls0, *cls1;
348 in0 = arch_get_irn_register(get_irn_n(node, 0));
349 in1 = arch_get_irn_register(get_irn_n(node, 1));
351 cls0 = arch_register_get_class(in0);
352 cls1 = arch_register_get_class(in1);
354 assert(cls0 == cls1 && "Register class mismatch at Perm");
356 be_emit_cstring("\txchg ");
357 amd64_emit_register (in0);
358 be_emit_cstring(", ");
359 amd64_emit_register (in1);
360 be_emit_finish_line_gas(node);
362 if (cls0 != &amd64_reg_classes[CLASS_amd64_gp]) {
363 panic("unexpected register class in be_Perm (%+F)", node);
367 static void emit_amd64_FrameAddr(const ir_node *irn)
369 const amd64_SymConst_attr_t *attr =
370 (const amd64_SymConst_attr_t*) get_amd64_attr_const(irn);
372 be_emit_cstring("\tmov ");
373 amd64_emit_source_register(irn, 0);
374 be_emit_cstring(", ");
375 amd64_emit_dest_register(irn, 0);
376 be_emit_finish_line_gas(irn);
378 be_emit_cstring("\tadd ");
379 be_emit_irprintf("$0x%X", attr->fp_offset);
380 be_emit_cstring(", ");
381 amd64_emit_dest_register(irn, 0);
382 be_emit_finish_line_gas(irn);
386 * Emits code to increase stack pointer.
388 static void emit_be_IncSP(const ir_node *node)
390 int offs = be_get_IncSP_offset(node);
396 be_emit_irprintf("\tsub ");
397 be_emit_irprintf("$%u, ", offs);
398 amd64_emit_dest_register(node, 0);
399 be_emit_finish_line_gas(node);
401 be_emit_irprintf("\tadd ");
402 be_emit_irprintf("$%u, ", -offs);
403 amd64_emit_dest_register(node, 0);
404 be_emit_finish_line_gas(node);
409 * Emits code for a return.
411 static void emit_be_Return(const ir_node *node)
413 be_emit_cstring("\tret");
414 be_emit_finish_line_gas(node);
418 static void emit_amd64_binop_op(const ir_node *irn, int second_op)
420 if (irn->op == op_amd64_Add) {
421 be_emit_cstring("\tadd ");
422 amd64_emit_source_register(irn, second_op);
423 be_emit_cstring(", ");
424 amd64_emit_dest_register(irn, 0);
425 be_emit_finish_line_gas(irn);
426 } else if (irn->op == op_amd64_Sub) {
427 be_emit_cstring("\tneg ");
428 amd64_emit_source_register(irn, second_op);
429 be_emit_finish_line_gas(irn);
430 be_emit_cstring("\tadd ");
431 amd64_emit_source_register(irn, second_op);
432 be_emit_cstring(", ");
433 amd64_emit_dest_register(irn, 0);
434 be_emit_finish_line_gas(irn);
435 be_emit_cstring("\tneg ");
436 amd64_emit_source_register(irn, second_op);
437 be_emit_finish_line_gas(irn);
443 * Emits an arithmetic operation that handles arbitraty input registers.
445 static void emit_amd64_binop(const ir_node *irn)
447 const arch_register_t *reg_s1 = arch_get_irn_register_in(irn, 0);
448 const arch_register_t *reg_s2 = arch_get_irn_register_in(irn, 1);
449 const arch_register_t *reg_d1 = arch_get_irn_register_out(irn, 0);
453 if (reg_d1 != reg_s1 && reg_d1 != reg_s2) {
454 be_emit_cstring("\tmov ");
455 amd64_emit_register(reg_s1);
456 be_emit_cstring(", ");
457 amd64_emit_register(reg_d1);
458 be_emit_finish_line_gas(irn);
461 } else if (reg_d1 == reg_s2 && reg_d1 != reg_s1) {
466 emit_amd64_binop_op(irn, second_op);
470 * The type of a emitter function.
472 typedef void (emit_func)(const ir_node *irn);
475 * Set a node emitter. Make it a bit more type safe.
477 static inline void set_emitter(ir_op *op, emit_func arm_emit_node)
479 op->ops.generic = (op_func)arm_emit_node;
483 * Enters the emitter functions for handled nodes into the generic
484 * pointer of an opcode.
486 static void amd64_register_emitters(void)
488 /* first clear the generic function pointer for all ops */
489 ir_clear_opcodes_generic_func();
491 /* register all emitter functions defined in spec */
492 amd64_register_spec_emitters();
494 set_emitter(op_amd64_SymConst, emit_amd64_SymConst);
495 set_emitter(op_amd64_Jmp, emit_amd64_Jmp);
496 set_emitter(op_amd64_Jcc, emit_amd64_Jcc);
497 set_emitter(op_amd64_Conv, emit_amd64_Conv);
498 set_emitter(op_amd64_FrameAddr, emit_amd64_FrameAddr);
499 set_emitter(op_be_Return, emit_be_Return);
500 set_emitter(op_be_Call, emit_be_Call);
501 set_emitter(op_be_Copy, emit_be_Copy);
502 set_emitter(op_be_IncSP, emit_be_IncSP);
503 set_emitter(op_be_Perm, emit_be_Perm);
505 set_emitter(op_amd64_Add, emit_amd64_binop);
506 set_emitter(op_amd64_Sub, emit_amd64_binop);
508 set_emitter(op_be_Start, emit_nothing);
509 set_emitter(op_be_Keep, emit_nothing);
510 set_emitter(op_Phi, emit_nothing);
513 typedef void (*emit_func_ptr) (const ir_node *);
516 * Emits code for a node.
518 static void amd64_emit_node(const ir_node *node)
520 ir_op *op = get_irn_op(node);
522 if (op->ops.generic) {
523 emit_func_ptr func = (emit_func_ptr) op->ops.generic;
526 ir_fprintf(stderr, "No emitter for node %+F\n", node);
531 * Walks over the nodes in a block connected by scheduling edges
532 * and emits code for each node.
534 static void amd64_gen_block(ir_node *block, void *data)
539 if (! is_Block(block))
542 be_gas_begin_block(block, true);
544 sched_foreach(block, node) {
545 amd64_emit_node(node);
551 * Sets labels for control flow nodes (jump target)
552 * TODO: Jump optimization
554 static void amd64_gen_labels(ir_node *block, void *env)
557 int n = get_Block_n_cfgpreds(block);
560 for (n--; n >= 0; n--) {
561 pred = get_Block_cfgpred(block, n);
562 set_irn_link(pred, block);
569 void amd64_gen_routine(ir_graph *irg)
571 ir_entity *entity = get_irg_entity(irg);
575 /* register all emitter functions */
576 amd64_register_emitters();
578 blk_sched = be_create_block_schedule(irg);
580 be_gas_emit_function_prolog(entity, 4, NULL);
582 irg_block_walk_graph(irg, amd64_gen_labels, NULL, NULL);
584 n = ARR_LEN(blk_sched);
585 for (i = 0; i < n; i++) {
586 ir_node *block = blk_sched[i];
587 ir_node *next = (i + 1) < n ? blk_sched[i+1] : NULL;
589 set_irn_link(block, next);
592 for (i = 0; i < n; ++i) {
593 ir_node *block = blk_sched[i];
595 amd64_gen_block(block, 0);
598 be_gas_emit_function_epilog(entity);