1 /* The main TEMPLATE backend driver file. */
8 #include "pseudo_irg.h"
18 #include "../bearch.h" /* the general register allocator interface */
19 #include "../benode_t.h"
20 #include "../belower.h"
21 #include "../besched_t.h"
25 #include "bearch_TEMPLATE_t.h"
27 #include "TEMPLATE_new_nodes.h" /* TEMPLATE nodes interface */
28 #include "gen_TEMPLATE_regalloc_if.h" /* the generated interface (register type and class defenitions) */
29 #include "TEMPLATE_gen_decls.h" /* interface declaration emitter */
30 #include "TEMPLATE_transform.h"
31 #include "TEMPLATE_emitter.h"
32 #include "TEMPLATE_map_regs.h"
34 #define DEBUG_MODULE "firm.be.TEMPLATE.isa"
36 /* TODO: ugly, but we need it to get access to the registers assigned to Phi nodes */
37 static set *cur_reg_set = NULL;
39 /**************************************************
42 * _ __ ___ __ _ __ _| | | ___ ___ _| |_
43 * | '__/ _ \/ _` | / _` | | |/ _ \ / __| | | _|
44 * | | | __/ (_| | | (_| | | | (_) | (__ | | |
45 * |_| \___|\__, | \__,_|_|_|\___/ \___| |_|_|
48 **************************************************/
50 static ir_node *my_skip_proj(const ir_node *n) {
57 * Return register requirements for a TEMPLATE node.
58 * If the node returns a tuple (mode_T) then the proj's
59 * will be asked for this information.
61 static const arch_register_req_t *TEMPLATE_get_irn_reg_req(const void *self, arch_register_req_t *req, const ir_node *irn, int pos) {
62 const TEMPLATE_register_req_t *irn_req;
63 long node_pos = pos == -1 ? 0 : pos;
64 ir_mode *mode = get_irn_mode(irn);
65 firm_dbg_module_t *mod = firm_dbg_register(DEBUG_MODULE);
67 if (mode == mode_T || mode == mode_M) {
68 DBG((mod, LEVEL_1, "ignoring mode_T, mode_M node %+F\n", irn));
72 DBG((mod, LEVEL_1, "get requirements at pos %d for %+F ... ", pos, irn));
75 /* in case of a proj, we need to get the correct OUT slot */
76 /* of the node corresponding to the proj number */
78 node_pos = TEMPLATE_translate_proj_pos(irn);
84 irn = my_skip_proj(irn);
86 DB((mod, LEVEL_1, "skipping Proj, going to %+F at pos %d ... ", irn, node_pos));
89 /* get requirements for our own nodes */
90 if (is_TEMPLATE_irn(irn)) {
92 irn_req = get_TEMPLATE_in_req(irn, pos);
95 irn_req = get_TEMPLATE_out_req(irn, node_pos);
98 DB((mod, LEVEL_1, "returning reqs for %+F at pos %d\n", irn, pos));
100 memcpy(req, &(irn_req->req), sizeof(*req));
102 if (arch_register_req_is(&(irn_req->req), should_be_same)) {
103 assert(irn_req->same_pos >= 0 && "should be same constraint for in -> out NYI");
104 req->other_same = get_irn_n(irn, irn_req->same_pos);
107 if (arch_register_req_is(&(irn_req->req), should_be_different)) {
108 assert(irn_req->different_pos >= 0 && "should be different constraint for in -> out NYI");
109 req->other_different = get_irn_n(irn, irn_req->different_pos);
112 /* get requirements for FIRM nodes */
114 /* treat Phi like Const with default requirements */
116 DB((mod, LEVEL_1, "returning standard reqs for %+F\n", irn));
118 if (mode_is_float(mode)) {
119 memcpy(req, &(TEMPLATE_default_req_TEMPLATE_floating_point.req), sizeof(*req));
121 else if (mode_is_int(mode) || mode_is_reference(mode)) {
122 memcpy(req, &(TEMPLATE_default_req_TEMPLATE_general_purpose.req), sizeof(*req));
124 else if (mode == mode_T || mode == mode_M) {
125 DBG((mod, LEVEL_1, "ignoring Phi node %+F\n", irn));
129 assert(0 && "unsupported Phi-Mode");
133 DB((mod, LEVEL_1, "returning NULL for %+F (node not supported)\n", irn));
141 static void TEMPLATE_set_irn_reg(const void *self, ir_node *irn, const arch_register_t *reg) {
145 pos = TEMPLATE_translate_proj_pos(irn);
146 irn = my_skip_proj(irn);
149 if (is_TEMPLATE_irn(irn)) {
150 const arch_register_t **slots;
152 slots = get_TEMPLATE_slots(irn);
156 /* here we set the registers for the Phi nodes */
157 TEMPLATE_set_firm_reg(irn, reg, cur_reg_set);
161 static const arch_register_t *TEMPLATE_get_irn_reg(const void *self, const ir_node *irn) {
163 const arch_register_t *reg = NULL;
166 pos = TEMPLATE_translate_proj_pos(irn);
167 irn = my_skip_proj(irn);
170 if (is_TEMPLATE_irn(irn)) {
171 const arch_register_t **slots;
172 slots = get_TEMPLATE_slots(irn);
176 reg = TEMPLATE_get_firm_reg(irn, cur_reg_set);
182 static arch_irn_class_t TEMPLATE_classify(const void *self, const ir_node *irn) {
183 irn = my_skip_proj(irn);
186 return arch_irn_class_branch;
188 else if (is_TEMPLATE_irn(irn)) {
189 return arch_irn_class_normal;
195 static arch_irn_flags_t TEMPLATE_get_flags(const void *self, const ir_node *irn) {
196 irn = my_skip_proj(irn);
198 if (is_TEMPLATE_irn(irn)) {
199 return get_TEMPLATE_flags(irn);
201 else if (is_Unknown(irn)) {
202 return arch_irn_flags_ignore;
208 static entity *TEMPLATE_get_frame_entity(const void *self, const ir_node *irn) {
209 /* TODO: return the entity assigned to the frame */
214 * This function is called by the generic backend to correct offsets for
215 * nodes accessing the stack.
217 static void TEMPLATE_set_stack_bias(const void *self, ir_node *irn, int bias) {
218 /* TODO: correct offset if irn accesses the stack */
221 /* fill register allocator interface */
223 static const arch_irn_ops_if_t TEMPLATE_irn_ops_if = {
224 TEMPLATE_get_irn_reg_req,
225 TEMPLATE_set_irn_reg,
226 TEMPLATE_get_irn_reg,
229 TEMPLATE_get_frame_entity,
230 TEMPLATE_set_stack_bias
233 TEMPLATE_irn_ops_t TEMPLATE_irn_ops = {
234 &TEMPLATE_irn_ops_if,
240 /**************************************************
243 * ___ ___ __| | ___ __ _ ___ _ __ _| |_
244 * / __/ _ \ / _` |/ _ \/ _` |/ _ \ '_ \ | | _|
245 * | (_| (_) | (_| | __/ (_| | __/ | | | | | |
246 * \___\___/ \__,_|\___|\__, |\___|_| |_| |_|_|
249 **************************************************/
252 * Transforms the standard firm graph into
253 * a TEMLPATE firm graph
255 static void TEMPLATE_prepare_graph(void *self) {
256 TEMPLATE_code_gen_t *cg = self;
258 irg_walk_blkwise_graph(cg->irg, NULL, TEMPLATE_transform_node, cg);
264 * Called immediatly before emit phase.
266 static void TEMPLATE_finish_irg(ir_graph *irg, TEMPLATE_code_gen_t *cg) {
267 /* TODO: - fix offsets for nodes accessing stack
274 * These are some hooks which must be filled but are probably not needed.
276 static void TEMPLATE_before_sched(void *self) {
277 /* Some stuff you need to do after scheduling but before register allocation */
280 static void TEMPLATE_before_ra(void *self) {
281 /* Some stuff you need to do immediatly after register allocation */
286 * Creates a Store for a Spill
288 static ir_node *TEMPLATE_lower_spill(void *self, ir_node *spill) {
289 TEMPLATE_code_gen_t *cg = self;
290 dbg_info *dbg = get_irn_dbg_info(spill);
291 ir_node *block = get_nodes_block(spill);
292 ir_node *ptr = get_irg_frame(cg->irg);
293 ir_node *val = be_get_Spill_context(spill);
294 ir_node *mem = new_rd_NoMem(cg->irg);
295 ir_mode *mode = get_irn_mode(spill);
297 entity *ent = be_get_spill_entity(spill);
298 unsigned offs = get_entity_offset_bytes(ent);
300 DB((cg->mod, LEVEL_1, "lower_spill: got offset %d for %+F\n", offs, ent));
302 /* TODO: create Store */
308 * Create a Load for a Spill
310 static ir_node *TEMPLATE_lower_reload(void *self, ir_node *reload) {
311 TEMPLATE_code_gen_t *cg = self;
312 dbg_info *dbg = get_irn_dbg_info(reload);
313 ir_node *block = get_nodes_block(reload);
314 ir_node *ptr = get_irg_frame(cg->irg);
315 ir_mode *mode = get_irn_mode(reload);
316 ir_node *pred = get_irn_n(reload, 0);
320 /* TODO: create Load */
326 * Emits the code, closes the output file and frees
327 * the code generator interface.
329 static void TEMPLATE_emit_and_done(void *self) {
330 TEMPLATE_code_gen_t *cg = self;
331 ir_graph *irg = cg->irg;
334 if (cg->emit_decls) {
335 TEMPLATE_gen_decls(cg->out);
339 TEMPLATE_finish_irg(irg, cg);
340 dump_ir_block_graph_sched(irg, "-TEMPLATE-finished");
341 TEMPLATE_gen_routine(out, irg, cg);
345 /* de-allocate code generator */
346 del_set(cg->reg_set);
350 static void *TEMPLATE_cg_init(FILE *F, const be_irg_t *birg);
352 static const arch_code_generator_if_t TEMPLATE_code_gen_if = {
354 TEMPLATE_prepare_graph,
355 TEMPLATE_before_sched, /* before scheduling hook */
356 TEMPLATE_before_ra, /* before register allocation hook */
357 TEMPLATE_lower_spill,
358 TEMPLATE_lower_reload,
359 TEMPLATE_emit_and_done
363 * Initializes the code generator.
365 static void *TEMPLATE_cg_init(FILE *F, const be_irg_t *birg) {
366 TEMPLATE_isa_t *isa = (TEMPLATE_isa_t *)birg->main_env->arch_env->isa;
367 TEMPLATE_code_gen_t *cg = xmalloc(sizeof(*cg));
369 cg->impl = &TEMPLATE_code_gen_if;
371 cg->reg_set = new_set(TEMPLATE_cmp_irn_reg_assoc, 1024);
372 cg->mod = firm_dbg_register("firm.be.TEMPLATE.cg");
374 cg->arch_env = birg->main_env->arch_env;
379 if (isa->num_codegens > 1)
384 cur_reg_set = cg->reg_set;
386 TEMPLATE_irn_ops.cg = cg;
388 return (arch_code_generator_t *)cg;
393 /*****************************************************************
394 * ____ _ _ _____ _____
395 * | _ \ | | | | |_ _|/ ____| /\
396 * | |_) | __ _ ___| | _____ _ __ __| | | | | (___ / \
397 * | _ < / _` |/ __| |/ / _ \ '_ \ / _` | | | \___ \ / /\ \
398 * | |_) | (_| | (__| < __/ | | | (_| | _| |_ ____) / ____ \
399 * |____/ \__,_|\___|_|\_\___|_| |_|\__,_| |_____|_____/_/ \_\
401 *****************************************************************/
403 static TEMPLATE_isa_t TEMPLATE_isa_template = {
405 &TEMPLATE_general_purpose_regs[REG_R6],
406 &TEMPLATE_general_purpose_regs[REG_R7],
412 * Initializes the backend ISA and opens the output file.
414 static void *TEMPLATE_init(void) {
415 static int inited = 0;
421 isa = xcalloc(1, sizeof(*isa));
422 memcpy(isa, &TEMPLATE_isa_template, sizeof(*isa));
424 TEMPLATE_register_init(isa);
425 TEMPLATE_create_opcodes();
435 * Closes the output file and frees the ISA structure.
437 static void TEMPLATE_done(void *self) {
443 static int TEMPLATE_get_n_reg_class(const void *self) {
447 static const arch_register_class_t *TEMPLATE_get_reg_class(const void *self, int i) {
448 assert(i >= 0 && i < N_CLASSES && "Invalid TEMPLATE register class requested.");
449 return &TEMPLATE_reg_classes[i];
455 * Get the register class which shall be used to store a value of a given mode.
456 * @param self The this pointer.
457 * @param mode The mode in question.
458 * @return A register class which can hold values of the given mode.
460 const arch_register_class_t *TEMPLATE_get_reg_class_for_mode(const void *self, const ir_mode *mode) {
461 if (mode_is_float(mode))
462 return &TEMPLATE_reg_classes[CLASS_TEMPLATE_floating_point];
464 return &TEMPLATE_reg_classes[CLASS_TEMPLATE_general_purpose];
470 * Produces the type which sits between the stack args and the locals on the stack.
471 * it will contain the return address and space to store the old base pointer.
472 * @return The Firm type modelling the ABI between type.
474 static ir_type *get_between_type(void) {
475 static ir_type *between_type = NULL;
476 static entity *old_bp_ent = NULL;
479 entity *ret_addr_ent;
480 ir_type *ret_addr_type = new_type_primitive(new_id_from_str("return_addr"), mode_P);
481 ir_type *old_bp_type = new_type_primitive(new_id_from_str("bp"), mode_P);
483 between_type = new_type_class(new_id_from_str("TEMPLATE_between_type"));
484 old_bp_ent = new_entity(between_type, new_id_from_str("old_bp"), old_bp_type);
485 ret_addr_ent = new_entity(between_type, new_id_from_str("old_bp"), ret_addr_type);
487 set_entity_offset_bytes(old_bp_ent, 0);
488 set_entity_offset_bytes(ret_addr_ent, get_type_size_bytes(old_bp_type));
489 set_type_size_bytes(between_type, get_type_size_bytes(old_bp_type) + get_type_size_bytes(ret_addr_type));
496 * Get the ABI restrictions for procedure calls.
497 * @param self The this pointer.
498 * @param method_type The type of the method (procedure) in question.
499 * @param abi The abi object to be modified
501 void TEMPLATE_get_call_abi(const void *self, ir_type *method_type, be_abi_call_t *abi) {
502 ir_type *between_type;
505 int i, n = get_method_n_params(method_type);
506 const arch_register_t *reg;
508 /* get the between type and the frame pointer save entity */
509 between_type = get_between_type();
511 /* set stack parameter passing style */
512 be_abi_call_set_flags(abi, BE_ABI_NONE, between_type);
514 for (i = 0; i < n; i++) {
515 /* TODO: implement register parameter: */
516 /* reg = get reg for param i; */
517 /* be_abi_call_param_reg(abi, i, reg); */
519 /* default: all parameters on stack */
520 be_abi_call_param_stack(abi, i);
523 /* TODO: set correct return register */
524 /* default: return value is in R0 resp. F0 */
525 if (get_method_n_ress(method_type) > 0) {
526 tp = get_method_res_type(method_type, 0);
527 mode = get_type_mode(tp);
529 be_abi_call_res_reg(abi, 0,
530 mode_is_float(mode) ? &TEMPLATE_floating_point_regs[REG_F0] : &TEMPLATE_general_purpose_regs[REG_R0]);
534 static const void *TEMPLATE_get_irn_ops(const arch_irn_handler_t *self, const ir_node *irn) {
535 return &TEMPLATE_irn_ops;
538 const arch_irn_handler_t TEMPLATE_irn_handler = {
542 const arch_irn_handler_t *TEMPLATE_get_irn_handler(const void *self) {
543 return &TEMPLATE_irn_handler;
546 int TEMPLATE_to_appear_in_schedule(void *block_env, const ir_node *irn) {
547 return is_TEMPLATE_irn(irn);
551 * Initializes the code generator interface.
553 static const arch_code_generator_if_t *TEMPLATE_get_code_generator_if(void *self) {
554 return &TEMPLATE_code_gen_if;
557 list_sched_selector_t TEMPLATE_sched_selector;
560 * Returns the reg_pressure scheduler with to_appear_in_schedule() overloaded
562 static const list_sched_selector_t *TEMPLATE_get_list_sched_selector(const void *self) {
563 memcpy(&TEMPLATE_sched_selector, trivial_selector, sizeof(list_sched_selector_t));
564 TEMPLATE_sched_selector.to_appear_in_schedule = TEMPLATE_to_appear_in_schedule;
565 return &TEMPLATE_sched_selector;
569 static void TEMPLATE_register_options(lc_opt_entry_t *ent)
572 #endif /* WITH_LIBCORE */
574 const arch_isa_if_t TEMPLATE_isa_if = {
576 TEMPLATE_register_options,
580 TEMPLATE_get_n_reg_class,
581 TEMPLATE_get_reg_class,
582 TEMPLATE_get_reg_class_for_mode,
583 TEMPLATE_get_call_abi,
584 TEMPLATE_get_irn_handler,
585 TEMPLATE_get_code_generator_if,
586 TEMPLATE_get_list_sched_selector,