2 * Copyright (C) 1995-2008 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief code selection (transform FIRM into TEMPLATE FIRM)
30 #include "irgraph_t.h"
39 #include "../benode_t.h"
40 #include "bearch_TEMPLATE_t.h"
42 #include "TEMPLATE_nodes_attr.h"
44 #include "TEMPLATE_transform.h"
45 #include "TEMPLATE_new_nodes.h"
46 #include "TEMPLATE_map_regs.h"
48 #include "gen_TEMPLATE_regalloc_if.h"
50 extern ir_op *get_op_Mulh(void);
54 /****************************************************************************************************
56 * | | | | / _| | | (_)
57 * _ __ ___ __| | ___ | |_ _ __ __ _ _ __ ___| |_ ___ _ __ _ __ ___ __ _| |_ _ ___ _ __
58 * | '_ \ / _ \ / _` |/ _ \ | __| '__/ _` | '_ \/ __| _/ _ \| '__| '_ ` _ \ / _` | __| |/ _ \| '_ \
59 * | | | | (_) | (_| | __/ | |_| | | (_| | | | \__ \ || (_) | | | | | | | | (_| | |_| | (_) | | | |
60 * |_| |_|\___/ \__,_|\___| \__|_| \__,_|_| |_|___/_| \___/|_| |_| |_| |_|\__,_|\__|_|\___/|_| |_|
62 ****************************************************************************************************/
65 * Creates an TEMPLATE Add.
67 * @param env The transformation environment
68 * @param op1 first operator
69 * @param op2 second operator
70 * @return the created TEMPLATE Add node
72 static ir_node *gen_Add(TEMPLATE_transform_env_t *env, ir_node *op1, ir_node *op2) {
73 return new_rd_TEMPLATE_Add(env->dbg, env->irg, env->block, op1, op2, env->mode);
79 * Creates an TEMPLATE Mul.
81 * @param dbg firm node dbg
82 * @param block the block the new node should belong to
83 * @param op1 first operator
84 * @param op2 second operator
85 * @param mode node mode
86 * @return the created TEMPLATE Mul node
88 static ir_node *gen_Mul(TEMPLATE_transform_env_t *env, ir_node *op1, ir_node *op2) {
89 if (mode_is_float(env->mode)) {
90 return new_rd_TEMPLATE_fMul(env->dbg, env->irg, env->block, op1, op2, env->mode);
93 return new_rd_TEMPLATE_Mul(env->dbg, env->irg, env->block, op1, op2, env->mode);
100 * Creates an TEMPLATE And.
102 * @param dbg firm node dbg
103 * @param block the block the new node should belong to
104 * @param op1 first operator
105 * @param op2 second operator
106 * @param mode node mode
107 * @return the created TEMPLATE And node
109 static ir_node *gen_And(TEMPLATE_transform_env_t *env, ir_node *op1, ir_node *op2) {
110 return new_rd_TEMPLATE_And(env->dbg, env->irg, env->block, op1, op2, env->mode);
116 * Creates an TEMPLATE Or.
118 * @param dbg firm node dbg
119 * @param block the block the new node should belong to
120 * @param op1 first operator
121 * @param op2 second operator
122 * @param mode node mode
123 * @return the created TEMPLATE Or node
125 static ir_node *gen_Or(TEMPLATE_transform_env_t *env, ir_node *op1, ir_node *op2) {
126 return new_rd_TEMPLATE_Or(env->dbg, env->irg, env->block, op1, op2, env->mode);
132 * Creates an TEMPLATE Eor.
134 * @param dbg firm node dbg
135 * @param block the block the new node should belong to
136 * @param op1 first operator
137 * @param op2 second operator
138 * @param mode node mode
139 * @return the created TEMPLATE Eor node
141 static ir_node *gen_Eor(TEMPLATE_transform_env_t *env, ir_node *op1, ir_node *op2) {
142 return new_rd_TEMPLATE_Eor(env->dbg, env->irg, env->block, op1, op2, env->mode);
148 * Creates an TEMPLATE Sub.
150 * @param dbg firm node dbg
151 * @param block the block the new node should belong to
152 * @param op1 first operator
153 * @param op2 second operator
154 * @param mode node mode
155 * @return the created TEMPLATE Sub node
157 static ir_node *gen_Sub(TEMPLATE_transform_env_t *env, ir_node *op1, ir_node *op2) {
158 if (mode_is_float(env->mode)) {
159 return new_rd_TEMPLATE_fSub(env->dbg, env->irg, env->block, op1, op2, env->mode);
162 return new_rd_TEMPLATE_Sub(env->dbg, env->irg, env->block, op1, op2, env->mode);
169 * Creates an TEMPLATE floating Div.
171 * @param dbg firm node dbg
172 * @param block the block the new node should belong to
173 * @param op1 first operator
174 * @param op2 second operator
175 * @param mode node mode
176 * @return the created TEMPLATE fDiv node
178 static ir_node *gen_Quot(TEMPLATE_transform_env_t *env, ir_node *op1, ir_node *op2) {
179 return new_rd_TEMPLATE_fDiv(env->dbg, env->irg, env->block, op1, op2, env->mode);
185 * Creates an TEMPLATE Shl.
187 * @param dbg firm node dbg
188 * @param block the block the new node should belong to
189 * @param op1 first operator
190 * @param op2 second operator
191 * @param mode node mode
192 * @return the created TEMPLATE Shl node
194 static ir_node *gen_Shl(TEMPLATE_transform_env_t *env, ir_node *op1, ir_node *op2) {
195 return new_rd_TEMPLATE_Shl(env->dbg, env->irg, env->block, op1, op2, env->mode);
201 * Creates an TEMPLATE Shr.
203 * @param dbg firm node dbg
204 * @param block the block the new node should belong to
205 * @param op1 first operator
206 * @param op2 second operator
207 * @param mode node mode
208 * @return the created TEMPLATE Shr node
210 static ir_node *gen_Shr(TEMPLATE_transform_env_t *env, ir_node *op1, ir_node *op2) {
211 return new_rd_TEMPLATE_Shr(env->dbg, env->irg, env->block, op1, op2, env->mode);
217 * Transforms a Minus node.
219 * @param mod the debug module
220 * @param block the block the new node should belong to
221 * @param node the ir Minus node
223 * @param mode node mode
224 * @return the created TEMPLATE Minus node
226 static ir_node *gen_Minus(TEMPLATE_transform_env_t *env, ir_node *op) {
227 if (mode_is_float(env->mode)) {
228 return new_rd_TEMPLATE_fMinus(env->dbg, env->irg, env->block, op, env->mode);
230 return new_rd_TEMPLATE_Minus(env->dbg, env->irg, env->block, op, env->mode);
236 * Transforms a Not node.
238 * @param mod the debug module
239 * @param block the block the new node should belong to
240 * @param node the ir Not node
242 * @param mode node mode
243 * @return the created TEMPLATE Not node
245 static ir_node *gen_Not(TEMPLATE_transform_env_t *env, ir_node *op) {
246 return new_rd_TEMPLATE_Not(env->dbg, env->irg, env->block, op, env->mode);
254 * @param mod the debug module
255 * @param block the block the new node should belong to
256 * @param node the ir Load node
257 * @param mode node mode
258 * @return the created TEMPLATE Load node
260 static ir_node *gen_Load(TEMPLATE_transform_env_t *env) {
261 ir_node *node = env->irn;
263 if (mode_is_float(env->mode)) {
264 return new_rd_TEMPLATE_fLoad(env->dbg, env->irg, env->block, get_Load_ptr(node), get_Load_mem(node), env->mode);
266 return new_rd_TEMPLATE_Load(env->dbg, env->irg, env->block, get_Load_ptr(node), get_Load_mem(node), env->mode);
272 * Transforms a Store.
274 * @param mod the debug module
275 * @param block the block the new node should belong to
276 * @param node the ir Store node
277 * @param mode node mode
278 * @return the created TEMPLATE Store node
280 static ir_node *gen_Store(TEMPLATE_transform_env_t *env) {
281 ir_node *node = env->irn;
283 if (mode_is_float(env->mode)) {
284 return new_rd_TEMPLATE_fStore(env->dbg, env->irg, env->block, get_Store_ptr(node), get_Store_value(node), get_Store_mem(node), env->mode);
286 return new_rd_TEMPLATE_Store(env->dbg, env->irg, env->block, get_Store_ptr(node), get_Store_value(node), get_Store_mem(node), env->mode);
291 /*********************************************************
294 * _ __ ___ __ _ _ _ __ __| |_ __ ___ _____ _ __
295 * | '_ ` _ \ / _` | | '_ \ / _` | '__| \ \ / / _ \ '__|
296 * | | | | | | (_| | | | | | | (_| | | | |\ V / __/ |
297 * |_| |_| |_|\__,_|_|_| |_| \__,_|_| |_| \_/ \___|_|
299 *********************************************************/
304 * Transforms the given firm node (and maybe some other related nodes)
305 * into one or more assembler nodes.
307 * @param node the firm node
308 * @param env the debug module
310 void TEMPLATE_transform_node(ir_node *node, void *env) {
312 TEMPLATE_code_gen_t *cgenv = (TEMPLATE_code_gen_t *)env;
314 ir_opcode code = get_irn_opcode(node);
315 ir_node *asm_node = NULL;
316 TEMPLATE_transform_env_t tenv;
322 tenv.block = get_nodes_block(node);
323 tenv.dbg = get_irn_dbg_info(node);
324 tenv.irg = current_ir_graph;
327 tenv.mod = cgenv->mod;
329 tenv.mode = get_irn_mode(node);
331 #define UNOP(a) case iro_##a: asm_node = gen_##a(&tenv, get_##a##_op(node)); break
332 #define BINOP(a) case iro_##a: asm_node = gen_##a(&tenv, get_##a##_left(node), get_##a##_right(node)); break
333 #define GEN(a) case iro_##a: asm_node = gen_##a(&tenv); break
334 #define IGN(a) case iro_##a: break
335 #define BAD(a) case iro_##a: goto bad
337 DBG((tenv.mod, LEVEL_1, "check %+F ... ", node));
358 /* TODO: implement these nodes */
373 /* You probably don't need to handle the following nodes */
404 if (get_irn_op(node) == get_op_Max() ||
405 get_irn_op(node) == get_op_Min() ||
408 /* TODO: implement */
413 fprintf(stderr, "Not implemented: %s\n", get_irn_opname(node));
418 exchange(node, asm_node);
419 DB((tenv.mod, LEVEL_1, "created node %+F[%p]\n", asm_node, asm_node));
422 DB((tenv.mod, LEVEL_1, "ignored\n"));