16 #include "../besched.h"
18 #include "TEMPLATE_emitter.h"
19 #include "gen_TEMPLATE_emitter.h"
20 #include "TEMPLATE_nodes_attr.h"
21 #include "TEMPLATE_new_nodes.h"
22 #include "TEMPLATE_map_regs.h"
24 #define SNPRINTF_BUF_LEN 128
26 static const arch_env_t *arch_env = NULL;
29 /*************************************************************
31 * (_) | | / _| | | | |
32 * _ __ _ __ _ _ __ | |_| |_ | |__ ___| |_ __ ___ _ __
33 * | '_ \| '__| | '_ \| __| _| | '_ \ / _ \ | '_ \ / _ \ '__|
34 * | |_) | | | | | | | |_| | | | | | __/ | |_) | __/ |
35 * | .__/|_| |_|_| |_|\__|_| |_| |_|\___|_| .__/ \___|_|
38 *************************************************************/
41 * Return a const or symconst as string.
43 static const char *node_const_to_str(ir_node *n) {
48 * Returns node's offset as string.
50 static char *node_offset_to_str(ir_node *n) {
54 /* We always pass the ir_node which is a pointer. */
55 static int TEMPLATE_get_arg_type(const lc_arg_occ_t *occ) {
56 return lc_arg_type_ptr;
61 * Returns the register at in position pos.
63 static const arch_register_t *get_in_reg(ir_node *irn, int pos) {
65 const arch_register_t *reg = NULL;
67 assert(get_irn_arity(irn) > pos && "Invalid IN position");
69 /* The out register of the operator at position pos is the
70 in register we need. */
71 op = get_irn_n(irn, pos);
73 reg = arch_get_irn_register(arch_env, op);
75 assert(reg && "no in register found");
80 * Returns the register at out position pos.
82 static const arch_register_t *get_out_reg(ir_node *irn, int pos) {
84 const arch_register_t *reg = NULL;
86 assert(get_irn_n_edges(irn) > pos && "Invalid OUT position");
88 /* 1st case: irn is not of mode_T, so it has only */
89 /* one OUT register -> good */
90 /* 2nd case: irn is of mode_T -> collect all Projs and ask the */
91 /* Proj with the corresponding projnum for the register */
93 if (get_irn_mode(irn) != mode_T) {
94 reg = arch_get_irn_register(arch_env, irn);
96 else if (is_TEMPLATE_irn(irn)) {
97 reg = get_TEMPLATE_out_reg(irn, pos);
100 const ir_edge_t *edge;
102 foreach_out_edge(irn, edge) {
103 proj = get_edge_src_irn(edge);
104 assert(is_Proj(proj) && "non-Proj from mode_T node");
105 if (get_Proj_proj(proj) == pos) {
106 reg = arch_get_irn_register(arch_env, proj);
112 assert(reg && "no out register found");
117 * Returns the number of the in register at position pos.
119 int get_TEMPLATE_reg_nr(ir_node *irn, int pos, int in_out) {
120 const arch_register_t *reg;
123 reg = get_in_reg(irn, pos);
126 reg = get_out_reg(irn, pos);
129 return arch_register_get_index(reg);
133 * Returns the name of the in register at position pos.
135 const char *get_TEMPLATE_reg_name(ir_node *irn, int pos, int in_out) {
136 const arch_register_t *reg;
139 reg = get_in_reg(irn, pos);
142 reg = get_out_reg(irn, pos);
145 return arch_register_get_name(reg);
149 * Get the register name for a node.
151 static int TEMPLATE_get_reg_name(lc_appendable_t *app,
152 const lc_arg_occ_t *occ, const lc_arg_value_t *arg)
155 ir_node *X = arg->v_ptr;
156 int nr = occ->width - 1;
159 return lc_arg_append(app, occ, "(null)", 6);
161 if (occ->conversion == 'S') {
162 buf = get_TEMPLATE_reg_name(X, nr, 1);
165 buf = get_TEMPLATE_reg_name(X, nr, 0);
168 lc_appendable_chadd(app, '%');
169 return lc_arg_append(app, occ, buf, strlen(buf));
173 * Returns the tarval or offset of an ia32 as a string.
175 static int TEMPLATE_const_to_str(lc_appendable_t *app,
176 const lc_arg_occ_t *occ, const lc_arg_value_t *arg)
179 ir_node *X = arg->v_ptr;
182 return lc_arg_append(app, occ, "(null)", 6);
184 if (occ->conversion == 'C') {
185 buf = node_const_to_str(X);
188 buf = node_offset_to_str(X);
191 return lc_arg_append(app, occ, buf, strlen(buf));
195 * Determines the SSE suffix depending on the mode.
197 static int TEMPLATE_get_mode_suffix(lc_appendable_t *app,
198 const lc_arg_occ_t *occ, const lc_arg_value_t *arg)
200 ir_node *X = arg->v_ptr;
203 return lc_arg_append(app, occ, "(null)", 6);
205 if (get_mode_size_bits(get_irn_mode(X)) == 32)
206 return lc_appendable_chadd(app, 's');
208 return lc_appendable_chadd(app, 'd');
212 * Return the ia32 printf arg environment.
213 * We use the firm environment with some additional handlers.
215 const lc_arg_env_t *TEMPLATE_get_arg_env(void) {
216 static lc_arg_env_t *env = NULL;
218 static const lc_arg_handler_t ia32_reg_handler = { ia32_get_arg_type, ia32_get_reg_name };
219 static const lc_arg_handler_t ia32_const_handler = { ia32_get_arg_type, ia32_const_to_str };
220 static const lc_arg_handler_t ia32_mode_handler = { ia32_get_arg_type, ia32_get_mode_suffix };
223 /* extend the firm printer */
224 env = firm_get_arg_env();
227 lc_arg_register(env, "ia32:sreg", 'S', &ia32_reg_handler);
228 lc_arg_register(env, "ia32:dreg", 'D', &ia32_reg_handler);
229 lc_arg_register(env, "ia32:cnst", 'C', &ia32_const_handler);
230 lc_arg_register(env, "ia32:offs", 'O', &ia32_const_handler);
231 lc_arg_register(env, "ia32:mode", 'M', &ia32_mode_handler);
238 * For 2-address code we need to make sure the first src reg is equal to dest reg.
240 void equalize_dest_src(FILE *F, ir_node *n) {
241 if (get_ia32_reg_nr(n, 0, 1) != get_ia32_reg_nr(n, 0, 0)) {
242 if (get_irn_arity(n) > 1 && get_ia32_reg_nr(n, 1, 1) == get_ia32_reg_nr(n, 0, 0)) {
243 if (! is_op_commutative(get_irn_op(n))) {
244 /* we only need to exchange for non-commutative ops */
245 lc_efprintf(ia32_get_arg_env(), F, "\txchg %1S, %2S\t\t\t/* xchg src1 <-> src2 for 2 address code */\n", n, n);
249 lc_efprintf(ia32_get_arg_env(), F, "\tmovl %1S, %1D\t\t\t/* src -> dest for 2 address code */\n", n, n);
255 * Add a number to a prefix. This number will not be used a second time.
257 char *get_unique_label(char *buf, size_t buflen, const char *prefix) {
258 static unsigned long id = 0;
259 snprintf(buf, buflen, "%s%lu", prefix, ++id);
265 * Returns the target label for a control flow node.
267 static char *get_cfop_target(const ir_node *irn, char *buf) {
268 ir_node *bl = get_irn_link(irn);
270 snprintf(buf, SNPRINTF_BUF_LEN, "BLOCK_%ld", get_irn_node_nr(bl));
274 /*********************************************************
277 * ___ _ __ ___ _| |_ _ _ _ _ __ ___ _ __ ___
278 * / _ \ '_ ` _ \| | __| | | | | | '_ ` _ \| '_ \/ __|
279 * | __/ | | | | | | |_ | | |_| | | | | | | |_) \__ \
280 * \___|_| |_| |_|_|\__| | |\__,_|_| |_| |_| .__/|___/
283 *********************************************************/
286 * Emits code for a Switch (creates a jump table if
287 * possible otherwise a cmp-jmp cascade).
289 void emit_TEMPLATE_Switch(const ir_node *irn, emit_env_t *emit_env) {
290 unsigned long interval;
295 const lc_arg_env_t *env = ia32_get_arg_env();
296 FILE *F = emit_env->out;
299 /* - create list of projs, each corresponding to one switch case */
300 /* - determine the projnumber of the default case */
302 tbl = create_jump_table(cases, def_projnum, "JMPTBL_");
304 /* two-complement's magic make this work without overflow */
305 interval = tbl.max_value - tbl.min_value;
307 /* check value interval: do not create jump table if interval is too large */
308 if (interval > 16 * 1024) {
312 /* check ratio of value interval to number of branches */
313 if (((float)(interval + 1) / (float)tbl.num_branches) > 8.0) {
318 /* TODO: emit table code */
321 /* TODO: emit cmp - jmp cascade */
332 /***********************************************************************************
335 * _ __ ___ __ _ _ _ __ | |_ _ __ __ _ _ __ ___ _____ _____ _ __| | __
336 * | '_ ` _ \ / _` | | '_ \ | _| '__/ _` | '_ ` _ \ / _ \ \ /\ / / _ \| '__| |/ /
337 * | | | | | | (_| | | | | | | | | | | (_| | | | | | | __/\ V V / (_) | | | <
338 * |_| |_| |_|\__,_|_|_| |_| |_| |_| \__,_|_| |_| |_|\___| \_/\_/ \___/|_| |_|\_\
340 ***********************************************************************************/
343 * Emits code for a node.
345 void TEMPLATE_emit_node(ir_node *irn, void *env) {
346 emit_env_t *emit_env = env;
347 firm_dbg_module_t *mod = emit_env->mod;
348 FILE *F = emit_env->out;
350 DBG((mod, LEVEL_1, "emitting code for %+F\n", irn));
352 #define BE_EMIT(a) if (is_TEMPLATE_##a(irn)) { emit_TEMPLATE_##a(irn, emit_env); return; }
354 /* generated int emitter functions */
390 /* generated floating point emitter */
406 /* other emitter functions */
409 ir_fprintf(F, "\t\t\t\t\t/* %+F */\n", irn);
413 * Walks over the nodes in a block connected by scheduling edges
414 * and emits code for each node.
416 void TEMPLATE_gen_block(ir_node *block, void *env) {
419 if (! is_Block(block))
422 fprintf(((emit_env_t *)env)->out, "BLOCK_%ld:\n", get_irn_node_nr(block));
423 sched_foreach(block, irn) {
424 TEMPLATE_emit_node(irn, env);
430 * Emits code for function start.
432 void TEMPLATE_emit_start(FILE *F, ir_graph *irg) {
433 const char *irg_name = get_entity_name(get_irg_entity(irg));
435 /* TODO: emit function header */
439 * Emits code for function end
441 void TEMPLATE_emit_end(FILE *F, ir_graph *irg) {
442 const char *irg_name = get_entity_name(get_irg_entity(irg));
444 /* TODO: emit function end */
448 * Sets labels for control flow nodes (jump target)
449 * TODO: Jump optimization
451 void TEMPLATE_gen_labels(ir_node *block, void *env) {
453 int n = get_Block_n_cfgpreds(block);
455 for (n--; n >= 0; n--) {
456 pred = get_Block_cfgpred(block, n);
457 set_irn_link(pred, block);
464 void TEMPLATE_gen_routine(FILE *F, ir_graph *irg, const ia32_code_gen_t *cg) {
467 emit_env.mod = firm_dbg_register("firm.be.TEMPLATE.emit");
469 emit_env.arch_env = cg->arch_env;
472 /* set the global arch_env (needed by print hooks) */
473 arch_env = cg->arch_env;
475 TEMPLATE_emit_start(F, irg);
476 irg_block_walk_graph(irg, TEMPLATE_gen_labels, NULL, &emit_env);
477 irg_walk_blkwise_graph(irg, NULL, TEMPLATE_gen_block, &emit_env);
478 TEMPLATE_emit_end(F, irg);