1 #define a_ctz_64 a_ctz_64
2 static inline int a_ctz_64(uint64_t x)
4 __asm__( "bsf %1,%0" : "=r"(x) : "r"(x) );
8 #define a_ctz_l a_ctz_l
9 static inline int a_ctz_l(unsigned long x)
11 __asm__( "bsf %1,%0" : "=r"(x) : "r"(x) );
15 #define a_and_64 a_and_64
16 static inline void a_and_64(volatile uint64_t *p, uint64_t v)
18 __asm__( "lock ; and %1, %0"
19 : "=m"(*p) : "r"(v) : "memory" );
22 #define a_or_64 a_or_64
23 static inline void a_or_64(volatile uint64_t *p, uint64_t v)
25 __asm__( "lock ; or %1, %0"
26 : "=m"(*p) : "r"(v) : "memory" );
30 static inline void a_or_l(volatile void *p, long v)
32 __asm__( "lock ; or %1, %0"
33 : "=m"(*(long *)p) : "r"(v) : "memory" );
37 static inline int a_cas(volatile int *p, int t, int s)
39 __asm__( "lock ; cmpxchg %3, %1"
40 : "=a"(t), "=m"(*p) : "a"(t), "r"(s) : "memory" );
45 static inline void a_or(volatile int *p, int v)
47 __asm__( "lock ; or %1, %0"
48 : "=m"(*p) : "r"(v) : "memory" );
52 static inline void a_and(volatile int *p, int v)
54 __asm__( "lock ; and %1, %0"
55 : "=m"(*p) : "r"(v) : "memory" );
59 static inline int a_swap(volatile int *x, int v)
61 __asm__( "xchg %0, %1" : "=r"(v), "=m"(*x) : "0"(v) : "memory" );
65 #define a_fetch_add a_fetch_add
66 static inline int a_fetch_add(volatile int *x, int v)
68 __asm__( "lock ; xadd %0, %1" : "=r"(v), "=m"(*x) : "0"(v) : "memory" );
73 static inline void a_inc(volatile int *x)
75 __asm__( "lock ; incl %0" : "=m"(*x) : "m"(*x) : "memory" );
79 static inline void a_dec(volatile int *x)
81 __asm__( "lock ; decl %0" : "=m"(*x) : "m"(*x) : "memory" );
84 #define a_store a_store
85 static inline void a_store(volatile int *p, int x)
87 __asm__( "mov %1, %0 ; lock ; orl $0,(%%rsp)" : "=m"(*p) : "r"(x) : "memory" );
91 static inline void a_spin()
93 __asm__ __volatile__( "pause" : : : "memory" );
96 #define a_barrier a_barrier
97 static inline void a_barrier()
99 __asm__ __volatile__( "" : : : "memory" );
102 #define a_crash a_crash
103 static inline void a_crash()
105 __asm__ __volatile__( "hlt" : : : "memory" );